JPS58141869U - Beamforming device - Google Patents
Beamforming deviceInfo
- Publication number
- JPS58141869U JPS58141869U JP3920882U JP3920882U JPS58141869U JP S58141869 U JPS58141869 U JP S58141869U JP 3920882 U JP3920882 U JP 3920882U JP 3920882 U JP3920882 U JP 3920882U JP S58141869 U JPS58141869 U JP S58141869U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- signals
- switch means
- received
- predetermined delay
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Variable-Direction Aerials And Aerial Arrays (AREA)
- Measurement Of Velocity Or Position Using Acoustic Or Ultrasonic Waves (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の試験信号発生装置を含むソーナー装置の
ブロック図、第2図は第1図の試験信号発生装置の構成
図、第3図は第1図のセンサアレイの動作を説明する図
、第4図は本考案の動作原理を説明する構成図、第5図
は本考案の実施例のブロック図、第6図は本考案の第2
の実施例のデジタルビームフォーミング装置のブロック
図である。因において、
11・・・・・・受波センサーアレイ、12・・・・・
・スイッチ、13・・・・・・前置増幅器、14・・・
・・・ビームフォーミング回路、141・・・・・・遅
延回路(デイレイラ・fン)、142.36・・・・・
・加算器、15・・・・・・信号処理器、16・・・・
・・表示器(CRT)、17・・・・・・試験信号発生
器、20:・・・・・発振器、21・・・・・・遅延回
路、22・・・・・・記憶回路、23・・・・・・スイ
ッチ、31・・・・・・入力信号調整器、32・・・・
・・サンプルアンドホールド回路、33・・・・・・マ
ルチプレクサ回路、34・・・・・・A/D変換器、3
5・・・・・・メモリ一部(RAM)、37・・・・・
・デマルチプレクサ回路、38・・・・・・D/A変換
器、39・・・・・・アドレス計算及びコントロールコ
ンピュータ、40・・・・・・操作盤である。FIG. 1 is a block diagram of a sonar device including a conventional test signal generating device, FIG. 2 is a block diagram of the test signal generating device of FIG. 1, and FIG. 3 is a diagram explaining the operation of the sensor array of FIG. 1. , FIG. 4 is a block diagram explaining the operating principle of the present invention, FIG. 5 is a block diagram of an embodiment of the present invention, and FIG. 6 is a second embodiment of the present invention.
FIG. 2 is a block diagram of a digital beamforming device according to an embodiment of the present invention. In this case, 11... Receiving sensor array, 12...
・Switch, 13... Preamplifier, 14...
...Beam forming circuit, 141...Delay circuit (derailleur/fun), 142.36...
・Adder, 15...Signal processor, 16...
... Display device (CRT), 17 ... Test signal generator, 20: ... Oscillator, 21 ... Delay circuit, 22 ... Memory circuit, 23 ...Switch, 31...Input signal conditioner, 32...
...Sample and hold circuit, 33...Multiplexer circuit, 34...A/D converter, 3
5... Part of memory (RAM), 37...
- Demultiplexer circuit, 38...D/A converter, 39...address calculation and control computer, 40...operation panel.
Claims (1)
に°それぞれ所定遅延を与えることにより受信ビーム信
号を成形するビームフォーミング装置において、前記受
波センサーアレイからの各受波信号をそれぞれ試験信号
と切替えてビームフォーミングのの客人力信号とする第
1のスイッチ手段と、前記各試験信号にビームフォーミ
ングされるための前記所定遅延を与えたm個の信号を記
憶させる記憶回路と、この記憶回路から読出されたm個
の信号と前記受波信号に対応する基準発振信号とを切替
えて前記第1のスイッチ手段に前記試・ 験信号とし
てそれぞれ供給する第2のスイッチ手段とを備え、前記
第1のスイッチ手段を切替えて前記基準発振信号に前記
所定遅延を与えて疑似受波信号を形成して前記記憶回路
に記憶させ、次に前記第2のスイッチ手段を切替えて前
記記憶回路からその疑似受波信号を読出して試験に用い
られるようにしたことを特徴とするビームフォーミング
装置。 4[Claims for Utility Model Registration] In a beam forming device that shapes a received beam signal by giving a predetermined delay to signals from m (m is a positive integer) receiving sensor arrays, the receiving sensor array a first switch means for switching each of the received signals from the test signal to a test signal as a beamforming signal; and m signals to which each of the test signals is given the predetermined delay for beamforming. a memory circuit for storing m signals read from the memory circuit and a reference oscillation signal corresponding to the received signal and supplying the same to the first switch means as the test signal, respectively; 2 switch means, the first switch means is switched to apply the predetermined delay to the reference oscillation signal to form a pseudo received signal and stored in the storage circuit, and then the second switch A beam forming device characterized in that the means is switched to read out the pseudo reception signal from the storage circuit and use it for testing. 4
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3920882U JPS58141869U (en) | 1982-03-19 | 1982-03-19 | Beamforming device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3920882U JPS58141869U (en) | 1982-03-19 | 1982-03-19 | Beamforming device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58141869U true JPS58141869U (en) | 1983-09-24 |
JPH0210470Y2 JPH0210470Y2 (en) | 1990-03-15 |
Family
ID=30050504
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3920882U Granted JPS58141869U (en) | 1982-03-19 | 1982-03-19 | Beamforming device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58141869U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002082161A (en) * | 2000-09-08 | 2002-03-22 | Mitsubishi Heavy Ind Ltd | Vibrator-adaptive sound simulating device |
-
1982
- 1982-03-19 JP JP3920882U patent/JPS58141869U/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002082161A (en) * | 2000-09-08 | 2002-03-22 | Mitsubishi Heavy Ind Ltd | Vibrator-adaptive sound simulating device |
JP4568413B2 (en) * | 2000-09-08 | 2010-10-27 | 三菱重工業株式会社 | Sound simulator for transducers |
Also Published As
Publication number | Publication date |
---|---|
JPH0210470Y2 (en) | 1990-03-15 |
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