JPS5813737U - flip-flop circuit - Google Patents
flip-flop circuitInfo
- Publication number
- JPS5813737U JPS5813737U JP10617881U JP10617881U JPS5813737U JP S5813737 U JPS5813737 U JP S5813737U JP 10617881 U JP10617881 U JP 10617881U JP 10617881 U JP10617881 U JP 10617881U JP S5813737 U JPS5813737 U JP S5813737U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- resistors
- common connection
- base
- connection point
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
図は本考案の一実施例の回路図。
１、 ２． ６． ７． １３および１４・・・・・・
トランジ −スタ１，３・・・・・・定電流回路
、ＩＮ・・・・・・トリガパルス入力端子、ＯＵＴ・・
・・・・出力端子。The figure is a circuit diagram of an embodiment of the present invention. 1, 2. 6. 7. 13 and 14...
Transistor 1, 3... Constant current circuit, IN... Trigger pulse input terminal, OUT...
...output terminal.
Claims (1)
よび第２のトランジスタと、コレクタ接地した第３のお
よび第４のトランジスタと、第３のトランジスタのエミ
ッタ電位を分圧する第１のおよび第２の抵抗と、第４の
トランジスタのエミッタ電位を分圧する第３のおよび第
４の抵抗と、第１のおよび第２の抵抗の共通接続点と第
３のおよび第４の抵抗の共通接続との間に接続した第５
の抵抗と、第１のおよび第２の抵抗の共通接続点と第３
のおよび第４の抵抗の共通接続点にトリガパルスを注入
する第５のおよび第６のトランジスタとを備え、第１の
トランジスタのコレクタを第４のトランジスタのベース
に接続し、第２のトランジスタのコレクタを第３のトラ
ンジスタ、のベースに接続し、第１のトランジスタのベ
ースを第１のおよび第２の抵抗の共通接続点に接続し、
第２のトランジスタのベースを第３のおよび第４の抵抗
の共通接続点に接続してなることを特徴とするフリップ
フロップ回路。First and second transistors whose emitters are commonly connected to form a differential amplifier, third and fourth transistors whose collectors are grounded, and first and second transistors which divide the emitter potential of the third transistor. a second resistor, third and fourth resistors that divide the emitter potential of the fourth transistor, a common connection point of the first and second resistors, and a common connection of the third and fourth resistors; The fifth connected between
, a common connection point of the first and second resistors, and a third resistor.
fifth and sixth transistors for injecting a trigger pulse into a common connection point of the and fourth resistors, the collector of the first transistor being connected to the base of the fourth transistor, and the collector of the first transistor being connected to the base of the fourth transistor; a collector connected to the base of a third transistor, and a base of the first transistor connected to a common connection point of the first and second resistors;
A flip-flop circuit characterized in that the base of the second transistor is connected to a common connection point of the third and fourth resistors.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10617881U JPS5813737U (en) | 1981-07-17 | 1981-07-17 | flip-flop circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10617881U JPS5813737U (en) | 1981-07-17 | 1981-07-17 | flip-flop circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5813737U true JPS5813737U (en) | 1983-01-28 |
Family
ID=29900686
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10617881U Pending JPS5813737U (en) | 1981-07-17 | 1981-07-17 | flip-flop circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5813737U (en) |
-
1981
- 1981-07-17 JP JP10617881U patent/JPS5813737U/en active Pending
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