JPS58137259A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS58137259A
JPS58137259A JP57019095A JP1909582A JPS58137259A JP S58137259 A JPS58137259 A JP S58137259A JP 57019095 A JP57019095 A JP 57019095A JP 1909582 A JP1909582 A JP 1909582A JP S58137259 A JPS58137259 A JP S58137259A
Authority
JP
Japan
Prior art keywords
polycrystalline silicon
oxide film
gate
floating gate
field oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57019095A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0218587B2 (enrdf_load_stackoverflow
Inventor
Kuniaki Koyama
小山 邦明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57019095A priority Critical patent/JPS58137259A/ja
Publication of JPS58137259A publication Critical patent/JPS58137259A/ja
Publication of JPH0218587B2 publication Critical patent/JPH0218587B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135Manufacturing their gate conductors
    • H10D84/014Manufacturing their gate conductors the gate conductors having different materials or different implants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
JP57019095A 1982-02-09 1982-02-09 半導体装置の製造方法 Granted JPS58137259A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57019095A JPS58137259A (ja) 1982-02-09 1982-02-09 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57019095A JPS58137259A (ja) 1982-02-09 1982-02-09 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS58137259A true JPS58137259A (ja) 1983-08-15
JPH0218587B2 JPH0218587B2 (enrdf_load_stackoverflow) 1990-04-26

Family

ID=11989909

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57019095A Granted JPS58137259A (ja) 1982-02-09 1982-02-09 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS58137259A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6326267B1 (en) 1998-05-18 2001-12-04 Nec Corporation Method of forming non-volatile semiconductor memory

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5464983A (en) * 1977-11-02 1979-05-25 Toshiba Corp Manufacture of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5464983A (en) * 1977-11-02 1979-05-25 Toshiba Corp Manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6326267B1 (en) 1998-05-18 2001-12-04 Nec Corporation Method of forming non-volatile semiconductor memory

Also Published As

Publication number Publication date
JPH0218587B2 (enrdf_load_stackoverflow) 1990-04-26

Similar Documents

Publication Publication Date Title
US5818085A (en) Body contact for a MOSFET device fabricated in an SOI layer
US7588973B2 (en) Semiconductor device and method of manufacturing the same
US5407837A (en) Method of making a thin film transistor
JPS638622B2 (enrdf_load_stackoverflow)
US7410874B2 (en) Method of integrating triple gate oxide thickness
JPH0586673B2 (enrdf_load_stackoverflow)
JPH0521450A (ja) 半導体装置及びその製造方法
EP1060510B1 (en) Method of forming dual field isolation structures
JP3529220B2 (ja) 半導体装置及びその製造方法
JPS598065B2 (ja) Mos集積回路の製造方法
US5612246A (en) Method for manufacturing semiconductor substrate having buck transistor and SOI transistor areas
JP2623659B2 (ja) Mis型トランジスタの製造方法
JPH01114070A (ja) 半導体装置の製造方法
JPS58137259A (ja) 半導体装置の製造方法
JPH03259564A (ja) 半導体装置の製造方法
JPS6310896B2 (enrdf_load_stackoverflow)
JPH07297275A (ja) 半導体装置の製造方法
JPH0127589B2 (enrdf_load_stackoverflow)
JP2877587B2 (ja) 半導体集積回路およびその作製方法
JPH0290569A (ja) 半導体装置の製造方法
JPH01157570A (ja) 半導体装置およびその製造方法
JPH04348077A (ja) 薄膜トランジスタ
JPS5935186B2 (ja) Mos型半導体装置の製造方法
JPS63116470A (ja) メモリトランジスタをもつ半導体装置の製造方法
JPS58192348A (ja) 半導体装置の製造方法