JPS58127367A - Shift register ic - Google Patents

Abstract

PURPOSE:To enable the manufacture of a shift register IC having a large logical amplitude and a high operation speed in simple manufacturing processes and at a low manufacturing cost, by forming a capacitor substrate of an Si thin film. CONSTITUTION:Instead of an MOS capacitor, a TFT capacitor, wherein the substrate is formed of a polycrystalline Si, an amorphous Si, etc. Si thin film, is used, and, instead of the MOS transistor, the TFT, wherein the source, drain and substrate are formed of a polycrystalline Si, an amorphous Si, etc. Si thin film, is used, and thus a bootstrap type shift register circuit is constituted. The numeral 301 represents a transparent insulation substrate (quartz glass, etc.), 302 a TFE gate, 303 and 304 a source and a drain, 305 a substrate, 306 a gate insulation film, 307 a TFT capacitor gate, 308 and 309 respectively a TFT capacitor substrate and the lead-out part for a substrate side electrode, 310 a capacitor insulation film, and 311 the wiring which binds 304 to 307.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a shift register integrated circuit of the Pootstrap type, and more particularly to a shift register integrated circuit formed as a thin film integrated circuit using polycrystalline silicon or amorphous silicon cape.

In recent years, a thin film transistor C is abbreviated as T'FT.

) is used as a switching element for a liquid crystal display (
%, liquid crystal displays (liquid crystal displays consisting of an active matrix substrate on which a TIFT array is fabricated and a liquid crystal display body) are being developed in various places.

Active matrix substrates using TFT arrays use ML transistors built into single-crystal silicon substrates.9) Compared to active matrix substrates, the manufacturing process is lower and the manufacturing process is simpler, and it is easier to increase the area. However, the transistor characteristics of TIFT are inferior to those of single-crystal silicon M08 transistors (e.g., low carrier mobility, high threshold voltage), making it difficult to connect the drive circuit to the active matrix substrate. It has the disadvantage that it is difficult to incorporate. The present invention proposes a shift register integrated circuit using thin film transistors, which is intended to be applied to an active matrix substrate, and which compensates for the above-mentioned drawbacks and has excellent performance.

Conventionally, when forming a shift register integrated circuit with MO8 transistors of a single conductivity type in a MOB integrated circuit using a single crystal silicon substrate, in order to obtain a sufficiently large logic amplitude and a sufficiently fast response speed, it is necessary to A Pootstrap type shift register circuit using an MO8 capacitor whose capacitance value changes is often used. FIG. 1-1 shows an example of a circuit that corresponds to one bit of the first stage of the shift register circuit. (In this example, the conduction type of the MO8 transistor is N type) MOS)
The transistor 101 is input to the terminal B and is switched by a four-way signal, and when this tarlock becomes NOI, the output data of the i-1st stage is read through the transistor 101. Node G (only when the data of it is 1) M08
The substrate of capacitor 105 is inverted and 105 operates as a date strap capacitor. Furthermore, terminal B (
When the clock signal becomes negative and input to terminal C<< or p becomes high, the potential at node G overshoots greatly compared to the high level of the clock signal, prompting conduction of transistor 102 (MOS). Accordingly, the potential at terminal n< reaches a high level at a high speed. Next, when the clock is inverted again and B4 becomes NO and C becomes low, the M08 transistor 103 becomes conductive, and the output terminals Di and ?
The potential of ( becomes low. At the same time, data is continuously transmitted to node D7+l, and the potential of IX+1 becomes high. On the other hand, terminal Kj-1 is connected to terminal D (+I), and the above-mentioned Di The electric charge held at node G during the same period as a −K is decreased is the i-th MOEI) transistor 101 and the IR-th MO8 transistor 10
4 and the potential of a6 becomes low. Figure 1 1
Reference numeral 61 shows an example of a shift register circuit constructed using the above-mentioned basic circuit, and FIG. 1 161 shows an example of a timing chart of signals of each part of the shift register circuit.

In FIG. 1 161 - 凰, φski clock signal,
8P is a start pulse, and it is a start pulse.
′? 1pGsePst;j each indicates the signal of the terminal with the same symbol in FIG. 1 g61. Figure 1 (a+
FIG. 2 shows a part of the cross-sectional structure of a circuit in which the basic circuit of the conventional circuit is integrated on a single-crystal silicon substrate. Second
The figure shows the MOS shown in FIG. The figure shows the MO capacitor 105 and its connection parts.
, 201 is a P-type single-crystal silicon substrate, 202 is the gate of the MO transistor 101, 203 and 204 are bases,
drain, 205 is a gate insulating film fi, 206 is M
The gate of the O8 capacitor 105, 207 is the substrate side electrode of the M08 capacitor, 208 is a capacitor insulating film, and 209 is a wiring connecting 204 and 206.

Further, 203, 204, and 207 are N-type silicon layers doped with impurities, 210 and 211 are P-type stopper layers, and 212 and 213 are interlayer insulating films. A conventional shift register integrated circuit having the structure shown in FIG.
PM junction (201- in FIG. 2) is used to electrically isolate multiple active elements formed on a silicon substrate.
203, 201-204, 201-207) must be provided. In addition, in order to prevent conduction between elements due to the inversion of the silicon substrate, a thick layer (21 in Fig. 2) is added.
O, 211) must be provided. Therefore, the manufacturing process becomes complicated and the manufacturing cost increases. (21) Due to the pN junction described above, there is a parasitic capacitance cml between the drain 204 and the silicon substrate 201, and there is also a parasitic capacitance cml between the wiring 209 and the silicon substrate 201.
A parasitic capacitance C#l exists between C#1 and C#1. ca is 1μ
-1 (about 1-' P F, csl is t per 1 μ-)
o-'~lO''''''PF, so the value as a whole is quite large.In the circuit, these parasitic capacitances are represented in the form of 106 of α1 (Fig. 1), so they inhibit the bootstrap capacitance 1050 131 TFT When considering the application of TFT arrays to display drive circuits, it is extremely difficult to fabricate them on the same substrate as the TFT arrays. By using the present invention, the above-mentioned drawbacks are overcome and it becomes possible to apply a bootstrap type shift register circuit to a drive circuit of a display using a TνT array. , the same part as that shown in FIG. 2 (transistor 101 of FIG. 1 Cα1)
．． A cross-sectional structure of a capacitor 105 and their coupling s) is shown. In the present invention, instead of the conventional MO8 capacitor, a TPT capacitor whose substrate is made of polycrystalline silicon or amorphous silicon thin film is used, and instead of the conventional M08 transistor, the source, drain, ? A Pootstrap type shift register circuit is constructed using TFi whose cost rate is formed from a silicon thin film such as polycrystalline silicon or amorphous silicon. In FIG. 3, 301 is a transparent insulating substrate (quartz glass), 302 is a TNTlol gate, 303,
304 is a source, a drain, 305 is a substrate,
306 is a gate insulating film, 307 is the gate of the TIFT capacitor 105, and 308 and 309 Fi are each Tν.
T capacitor substrate, substrate) II electrode take-out part, 31O is capacitor insulation H2311 is wiring connecting 304 and 307. Also, 314
, 315, 316, 317 are through holes, -318,
319, 320, 321, and 322 are interlayer insulating films.

In this example, 303, 304, 309 are silicon thin film layers doped with impurities, 305, 308 are not doped with impurities, 303, 304, 309
302, 307 is a silicon thin film layer doped with impurities at a lower concentration than 311, . 312 and 313 are metals.

PM for separating elements by using the present invention
A stopper layer for preventing bonding and substrate inversion becomes unnecessary. Therefore, the manufacturing process is simplified compared to the conventional structure. Further, there is no parasitic capacitance between the drain and the transparent substrate and between the wiring and the transparent substrate.

That is, the value of the parasitic capacitance 106 in FIG. Further, when considering the application of the present invention to a display drive circuit using TPT play as a switch, the shift register integrated circuit of the present invention can be
'On the same transparent substrate as the IPT array) (This objective can be easily achieved by fabricating it in the same manufacturing process as the TNT array. Since a shift register is essential for driving a display using TFτ play, this By applying the invention, the shift register integrated circuit is fabricated on the same substrate as the TPT playback, which has a great effect in the sense of simplifying the manufacturing process of the display device and reducing the manufacturing cost. This figure also shows the same parts as FIGS. 2 and 3 (FIGS. 1 and 1).
a1. transistor 101. 3 shows a cross-sectional structure of a capacitor 105 and a coupling portion thereof. In FIG. 4, 401 is a transparent insulating substrate, and 402 is the T of FIG.
FTlol gate, 403 and 404 are sources and drains, 405 is a substrate, 406 is a gate insulating film, 407 is a gate of T1PT canister 105,
408 is a substrate, 409 is a lead-out portion of the electrode on the substrate side, 41O is a capacitor insulating film, and 411 is a wiring connecting 404 and 407. Also, 414
, 415, 416 are through holes. 403,40
4,409 is an impurity-doped silicon thin film layer, 40
5.408 is not doped with impurities or 4
03,404,409 is also a silicon thin film layer doped with impurities at a low concentration, 402.407,411
, 412, 413ti metal.

The scope of application of the present invention is not limited to the shift register circuit shown in FIG. 1 Ca), but the present invention utilizes the concept of the basic circuit shown in FIG. Applies to all register integrated circuits.

As described above, by using the present invention, a shift register integrated circuit having sufficiently large logic amplitude and sufficiently high operating speed can be manufactured using a simple manufacturing process and at low manufacturing cost. In addition, when driving a display such as a liquid crystal using a TFT switch array, the TIFT
When the shift register integrated circuit of the present invention is fabricated on the same substrate as the switch array, it is more effective in simplifying the display mounting process and reducing the manufacturing cost of the display device.

[Brief explanation of drawings]

Figure 1 (α1. Figure 1 (h+) and Figure 1 (1cl) are an example of a basic circuit of a Pootstrap type shift register using an M08 capacitor, a block diagram of the shift register, and a timing chart showing the operation of each part. The figure shows a shift register integrated circuit having a conventional structure. Figure 3 is a diagram for explaining the first embodiment of the present invention. Figure #!4 is a diagram for explaining the second embodiment of the present invention. ., r l 2nd eye fear 1 H]]

Claims (1)

[Claims] ill MO whose capacitance value changes depending on gate voltage
A shift register integrated circuit of a Pootstrap type constructed using a capacitor and a plurality of MO8 transistors, characterized in that a substrate side electrode of the MO8 capacitor is formed of a silicon thin film. 121. The shift register integrated circuit according to claim 1, wherein the sources, drains, and substrates of all M08 transistors constituting the shift register integrated circuit are formed of silicon thin films. (31) Patent claim OfI # that the shift register and the collector circuit are provided on the same transparent insulating substrate as the switching transistor array;
The shift register integrated circuit according to items 1 to 2 of the subsections.