JPS58122768A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS58122768A
JPS58122768A JP471382A JP471382A JPS58122768A JP S58122768 A JPS58122768 A JP S58122768A JP 471382 A JP471382 A JP 471382A JP 471382 A JP471382 A JP 471382A JP S58122768 A JPS58122768 A JP S58122768A
Authority
JP
Japan
Prior art keywords
layer
poly
impurity
diffusion
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP471382A
Other languages
Japanese (ja)
Inventor
Seiji Hayashi
征治 林
Kenji Murakami
賢二 村上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP471382A priority Critical patent/JPS58122768A/en
Priority to EP82112097A priority patent/EP0084178B1/en
Priority to DE8282112097T priority patent/DE3278654D1/en
Priority to US06/455,837 priority patent/US4455547A/en
Publication of JPS58122768A publication Critical patent/JPS58122768A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0605Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce the impurity diffusion length and thus contrive the improvement of the linear characteristic of poly Si resistance, by selectively oxidizing a part of the side to diffuse the impurity of a poly Si layer into a thin layer. CONSTITUTION:After patterning the poly Si layer 21, an SiO2 layer 22 is formed, then an Si3N4 mask 23 is applied resulting in a selective oxidation, and thus the poly Si 21 is slightly left at the lower end of the layer 21. Next, after superposing a CVDSiO2 layer 26, an impurity 27 is diffused. Thereat, since the diffusion route is formed narrow on its halfway, the density decreases at the region wherein the route is enlarged, and accordingly the diffusion length xj can be reduced. As a result, the linear characteristic of poly Si resistance is remarkably improved.

Description

【発明の詳細な説明】 lI嘴の技術分野 この発明は4リシリコン抵抗において、不純物を拡散す
る場合にその拡散長をできるだけ短くして4リシリコン
抵抗の纏1141性を曳くした半導体装置に関する。
DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a semiconductor device in which the diffusion length of an impurity is made as short as possible when diffusing impurities in a 4-Si resistor to avoid the 1141 characteristic of a 4-Si resistor.

発明の技術的背景 現在、ぼりシリコンは半導体装置において、不純物を導
入し、その不純物濃度を変え配線材料または高抵抗部分
とするなど広く利用されている。この場合において、ポ
リシリコンを高抵抗部分、低抵抗部分として同時に利用
する場合には以下に述べる方法がある・まず%lリシリ
コン層11を工、チンダによジノ譬ターニングし友後、
表面に薄い8102層11に形成する0次に−CVD#
lO,層11をかぶせ、高抵抗にしたいばりシリコン1
1上に形成されたcvngto、層13の外o gto
、だけ?PEP(写真蝕刻工S)により除去する。この
結果、第1図に示すような断面となる0次に、不純物1
4、例えばpt−導入するわけである。ここで、Iリシ
リコン層11中への不純物140横方向への拡散長t 
XJとすると、高抵抗部分として残るのはL−2x5で
ある。ζこで、このようにして作成したポリシリコン抵
抗の両端に電圧V【印加した場合に流れる電流を近似し
た式は下記の如くである・ ζこで% C(T)は温度とダレイン間ノfリア高さに
依存する定数、kはメルツマン定数、Tは絶対11、N
は単位長さ轟pのポリシリコンのダレイン数を表わして
いる。上記(1)式から明らかなように、V−I−纏は
電圧Vが小さい領域で線型で、電圧Vが大暑くなると電
l51Xは電圧VK対して指数−数的に増大する。従っ
て、特性安定の大めにはV−I曲線01111領域を行
うことが望壇しい、すなわち、L−2xjriできるだ
け大きい方が良いというむとになる。とこで、Lに対し
てはディイス0黴細化に伴う制約からめ壕)大きくする
ことはできない、tた、現在不純物として?を拡散する
場合、  XJを不純物濃度が10”fi−″となる迄
0長さとすると、6J−S変であるが、これを小さくす
ることに力が注がれている。
Technical Background of the Invention At present, wafer silicon is widely used in semiconductor devices, such as by introducing impurities and changing the impurity concentration to use it as a wiring material or a high-resistance portion. In this case, if polysilicon is to be used as a high-resistance portion and a low-resistance portion at the same time, there is a method described below: First, process the polysilicon layer 11, turn it with a tin, and then
Zero-order -CVD # to form a thin 8102 layer 11 on the surface
Ibari silicon 1 covered with lO, layer 11 to make it high resistance
cvngto formed on layer 1, outside o gto of layer 13
,only? Removed by PEP (photo etchant S). As a result, the impurity 1
4. For example, pt-introduction. Here, the lateral diffusion length t of the impurity 140 into the silicon layer 11
If it is XJ, then L-2x5 remains as the high resistance part. ζThe equation that approximates the current that flows when a voltage V is applied across the polysilicon resistor created in this way is as follows. f is a constant that depends on rear height, k is Meltzmann constant, T is absolute 11, N
represents the Dalene number of polysilicon of unit length P. As is clear from the above equation (1), the VI voltage is linear in a region where the voltage V is small, and when the voltage V becomes very hot, the electric current 151X increases exponentially with respect to the voltage VK. Therefore, it is preferable to use the VI curve in the 01111 region for more stable characteristics, that is, it is better to make L-2xjri as large as possible. By the way, L cannot be made larger due to restrictions associated with microbialization, so is it currently treated as an impurity? When diffusing XJ, if XJ is set to 0 length until the impurity concentration reaches 10"fi-", the result is 6J-S, but efforts are being made to reduce this.

背景技術0間厘点 上記した拡散−1kxJを小さくする大めの手段として
拡散温変を下げることと、拡散係数の小さな不純物の導
入を試みるということが行なわれているが、望まれるべ
き小さな拡散長を得ることはできなかつ友。
BACKGROUND TECHNOLOGY As a major means of reducing the above-mentioned diffusion -1kxJ, attempts have been made to lower the diffusion temperature change and introduce impurities with a small diffusion coefficient, A friend who can't get a head.

発明の目的 この発明は上記の点Kliみてなされ喪4ので、て高抵
抗部分、低抵抗部分を形成する場合において、上記不純
物の拡散長を小さくすることによりポリシリコン層によ
υ形成された抵抗の纏1lIIII性を向上させるよう
Kした半導体装置を提供するととにある。
Purpose of the Invention The present invention has been made in view of the above point Kli, and therefore, when forming high-resistance portions and low-resistance portions, the resistance υ formed by the polysilicon layer is reduced by reducing the diffusion length of the impurity. It is an object of the present invention to provide a semiconductor device having improved performance.

li#4の概要 ポリシリコン層の不純物を拡散する側のぼりシリコン層
の一部を選択的に酸化して、上記Iリシリコン層の一部
を薄くすることによシネ細物の拡散長を小さくし、形成
された/IJポリシリコン抵抗型特性を改善している。
Overview of li #4 By selectively oxidizing a part of the side silicon layer for diffusing impurities in the polysilicon layer and thinning a part of the silicon layer, the diffusion length of the cine fine particles is reduced. , the formed /IJ polysilicon resistor type characteristics have been improved.

発明の*m例 以下、図面を参照してこの発明の一実施例を説明する。*m example of invention Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

まず、第2図囚に示すように/リシリコン層21を・ダ
ターニングした後酸化して5101層21を形成する。
First, as shown in FIG. 2, the 5101 layer 21 is formed by data-turning the silicon layer 21 and then oxidizing it.

その後5IN4JJデポジシ璽ンをし、81NiljJ
をPEP (写真蝕刻工程)Kよシエッチングして同図
(IIに示すように孔14,21it形成する。そして
、上記孔24゜21を介してぼりシリコン21′を選択
酸化する。
After that, 5IN4JJ deposit seal and 81NiljJ
The silicon 21' is selectively oxidized through the holes 24.degree.

そして、1iiN層11を二プチングした後祉第2因仲
に示すよ乃な断面図となる。上記選択酸化においてはI
リン93フ層21の下端まで酸化させるのでは壜(、僅
かに4リシリコンが残っている状態で酸化管中断する6
次に、上記1110゜層1j上に同図0)に示すように
C■1110.層2Cを形成する。そして、同図(2)
に示すようKP等の不純物ZVO拡散を行なうが不純物
の拡散径路が途中でせばめられているため、不純物2r
會拡散する時KFi再び径路が広がり要所で不純物議f
が減少しtXJを小さくすることがある。
Then, after the 1iiN layer 11 is doubled, a cross-sectional view similar to that shown in the second figure is obtained. In the above selective oxidation, I
In order to oxidize all the way to the bottom of the phosphor layer 21, the oxidation tube should be interrupted with only a small amount of silicon remaining.
Next, as shown in FIG. 0) on the 1110° layer 1j, C■1110. Form layer 2C. And the same figure (2)
As shown in Figure 2, impurity ZVO diffusion such as KP is performed, but since the impurity diffusion path is narrowed in the middle, the impurity 2r
When the meeting spreads, the KFi route expands again and impurity controversy f
may decrease, making tXJ smaller.

同図(ロ)に示す構造において、x=o、6声−1y工
2 l111Ia i m 0.06 l1111とし
九場合、同一10セスで側作した場合、拡散層XJ t
 2細小さくすることができる。
In the structure shown in the same figure (b), when x = o, 6 voices - 1y work 2 l111Ia i m 0.06 l1111, and when side cropping is done in the same 10 cess, the diffusion layer XJ t
It can be made smaller by 2.

発明の効果 以上詳述したようにこの発明によれば、ぼりシリコン層
の不純物を拡散する備のIリシリコン層の一部を選択酸
化して、Iリシリコン層の一部を薄くしたので、不純物
の拡散長を小さくでき、形成されたポリシリコン抵抗の
ivA型時性を向上させることがで舞る。
Effects of the Invention As detailed above, according to the present invention, a part of the I-Si layer for diffusing impurities in the I-Si layer is selectively oxidized to thin the I-Si layer. This makes it possible to reduce the diffusion length and improve the ivA type characteristics of the formed polysilicon resistor.

【図面の簡単な説明】[Brief explanation of the drawing]

111図は従来のポリシリコン抵抗を示す断面図、第2
図(4)ないしくI)はこの発明に係る半導体装置の製
造工程を示す図である。 21・・・Iリシリコンl−122・・・810271
1. J !・81N II、  j [CVD5i0
2層、j7−・・不純物。 出願入代1人  弁1士 鉤 江 武 彦6     
 A        Aにの      0     
  0
Figure 111 is a cross-sectional view showing a conventional polysilicon resistor.
FIGS. (4) to (I) are diagrams showing the manufacturing process of the semiconductor device according to the present invention. 21...I silicon l-122...810271
1. J!・81N II, j [CVD5i0
2nd layer, j7-... impurity. 1 person for application, 1 speaker, Takehiko Kakee 6
AA 0
0

Claims (1)

【特許請求の範囲】[Claims] ぼりシリコン抵抗において、不純物を拡散する側のIリ
シリコン層の一部を選択的に酸化し、上記4リシリコン
層〇一部を薄くしていることを特徴とする半導体装置。
1. A semiconductor device in which a portion of the I-Si layer on the side where impurities is diffused is selectively oxidized to thin a portion of the I-Si layer in the I-Si resistor.
JP471382A 1982-01-14 1982-01-14 Semiconductor device Pending JPS58122768A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP471382A JPS58122768A (en) 1982-01-14 1982-01-14 Semiconductor device
EP82112097A EP0084178B1 (en) 1982-01-14 1982-12-29 Resistive element formed in a semiconductor substrate
DE8282112097T DE3278654D1 (en) 1982-01-14 1982-12-29 Resistive element formed in a semiconductor substrate
US06/455,837 US4455547A (en) 1982-01-14 1983-01-05 Resistive element formed in a semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP471382A JPS58122768A (en) 1982-01-14 1982-01-14 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS58122768A true JPS58122768A (en) 1983-07-21

Family

ID=11591519

Family Applications (1)

Application Number Title Priority Date Filing Date
JP471382A Pending JPS58122768A (en) 1982-01-14 1982-01-14 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS58122768A (en)

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