JPS58119660A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS58119660A
JPS58119660A JP57001705A JP170582A JPS58119660A JP S58119660 A JPS58119660 A JP S58119660A JP 57001705 A JP57001705 A JP 57001705A JP 170582 A JP170582 A JP 170582A JP S58119660 A JPS58119660 A JP S58119660A
Authority
JP
Japan
Prior art keywords
lead frame
lead
semiconductor element
synthetic resin
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57001705A
Other languages
Japanese (ja)
Inventor
Kosuke Tange
丹下　孝輔
Seietsu Tanaka
田中　誠悦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP57001705A priority Critical patent/JPS58119660A/en
Publication of JPS58119660A publication Critical patent/JPS58119660A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
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    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/325—Material
    • H01L2224/32505—Material outside the bonding interface, e.g. in the bulk of the layer connector
    • H01L2224/32506—Material outside the bonding interface, e.g. in the bulk of the layer connector comprising an eutectic alloy
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    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To increase the adherence between a lead frame and synthetic resin as well as to improve the dampproof property of the titled semiconductor device by a method wherein a groove is provided on the front and back sides of the lead located inside an IC lead frame. CONSTITUTION:The lead frame 1 is usually rolled out from the material such as Kovar 42 alloy, copper, iron and the like, and a desired lead frame can be obtained by performig a press-punching or an etching. At this time, grooves 2 and 3 can be obtained by protruding the station 1 of a continuous molding mold from the direction of both surfaces by applying pressure using a coma and by preforming a press-working. Also, on the lead frame 1, a partial gold or silver plating is performed in the desired thickness at the point part of an island part 4 and the point part of an inner lead 11 for installation of a semiconductor element 5. Subsequently, a die bonding is performed on the semiconductor element 5 using an eutectic alloy, a bonding agent or solder, and also a wire bonding 6 is performed using a gold or aluminum wire. Then, a sealing is performed using synthetic resin, epoxy resin and the like, and after a lead working has been performed, a solder processing is conducted, electric characteristics are inspected, and lartly, the semiconductor device is completed.

Description

【発明の詳細な説明】 この発明は、ＩＣＣリーフレームのモールド内部リード
の表裏面Ｋ１１ｌｌＳを設け、モールドレジンとの密着
性を向上させるようＫし本生導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a live conductor device in which front and back surfaces K11llS of leads inside the mold of an ICC leaf frame are provided to improve adhesion to the mold resin.

第１図はこの発明の半導体装置の平面図でＴｏり、第２
図は第１図の人−に線に沿って切断した断面図である。FIG. 1 is a plan view of a semiconductor device according to the present invention;
The figure is a sectional view taken along the human line of FIG. 1.

さらに、第３図は第１図のＢ−Ｂ’線に沿って切断して
示す断面図である。仁の第１図ないし第３図を援用して
従来の半導体装置について撰述する。Furthermore, FIG. 3 is a sectional view taken along line BB' in FIG. 1. Conventional semiconductor devices will be briefly described with reference to FIGS. 1 to 3 of Jin.

図中の１はリードフレームであｊｌ）、２．３は後述す
るこの発明によル設けられ７ｔ＃ｌｓである。こＯ＃１
ｉｌＳ２．３ｔ；を従来Ｏ−Ｅニーｚｒ！ｊｌｌｌｃで
ｕ設けられておらず、したがって、このｊｌ　＠　２　
ｅ　３のないリードーム１でアイランドＩＳ４に半導体
素子５を取如付け、ワイヤがンディンダ６′ｆ：行って
合成樹脂７で封止したモールドｆｆ１Ｉｃｔ構成してい
る。In the figure, 1 is a lead frame, and 2.3 is a lead frame 7t#ls, which is provided according to the present invention, which will be described later. This O#1
ilS2.3t; conventional O-E knee zr! u is not provided in jlllc and therefore this jl@2
A semiconductor element 5 is mounted on an island IS4 in a lead dome 1 without e3, and a mold ff1Ict is formed in which wires are placed in an endinder 6'f and sealed with a synthetic resin 7.

このような従来のモールド！ｍＩｃ製品はり−ド１１８
と合成樹脂７との界１ｊ９から浸入する汚れを含んだ水
分がリード７レー五素材を圧延したときに生じるロール
傷１０などに沿って浸入し、遂には、半導体素子部に到
達する。この浸入の途中で合成樹脂７などから溶出する
不純物でさらに浸入水分は電解質にな）、半導体素子部
（ＩＣ素子）に配線しているアル建ニウムと電気化学的
に反応し、腐蝕現象を起こし、遂にに断線に至らせる欠
点があった。Such a traditional mold! mIc product beam board 118
Moisture containing dirt that enters from the boundary 1j9 between the lead 7 and the synthetic resin 7 enters along the roll scratches 10 generated when the lead 7 and the lead 5 materials are rolled, and finally reaches the semiconductor element portion. During this infiltration, impurities eluted from the synthetic resin 7, etc., further infiltrated water becomes an electrolyte), reacts electrochemically with aluminum wired in the semiconductor element (IC element), and causes corrosion. However, there was a drawback that eventually led to disconnection.

仁の発明は、上記従来の欠点を除去するためＫなされた
もので、リードフレームと合成樹脂との密Ａ７性をよく
し、耐湿性を向上させることのできる半導体装置を提供
することを目的とする。Jin's invention was made in order to eliminate the above-mentioned conventional drawbacks, and aims to provide a semiconductor device that can improve the tightness between the lead frame and the synthetic resin and improve moisture resistance. do.

以下、この発明の半導体装置の実施例について再び第１
図ないし第３図により説明する。リードフレーム１は通
常コパーλ４２合金、銅系、鉄系などの素材〃≧ら圧延
し、プレス抜きまたはエツチング法により任意のリード
フレームが得られる。Hereinafter, the first embodiment of the semiconductor device of the present invention will be explained again.
This will be explained with reference to FIGS. The lead frame 1 is usually rolled from a material such as copper λ42 alloy, copper-based, iron-based, etc., and an arbitrary lead frame can be obtained by pressing or etching.

このリードフレーム１を製作する際に、溝部２３をプレ
スツノ１１工の場合は連続金型の１ステーシヨンにて両
ｎｕ　（表嫉）方向から突出し、コマで圧力をかけ、プ
レス加工することで得られる。この溝部２．３の寸法は
通常幅０．０５〜１．００　ｕＬ、深さが０．０１〜０
．０７ｍ程度が適当でるる、また、溝部２．３の形状は
ｒＶＪ　、ｒＵＪ　、ｒＷＪ字状のいずれでも可能であ
る。When manufacturing this lead frame 1, if the groove part 23 is made with 11 press horns, it can be obtained by protruding from both nu (front side) directions at one station of a continuous mold, applying pressure with a piece, and press working. . The dimensions of this groove 2.3 are usually 0.05 to 1.00 uL in width and 0.01 to 0 in depth.
．． Approximately 0.07 m is suitable, and the shape of the groove portion 2.3 can be any of rVJ, rUJ, and rWJ shapes.

エツチングの方法でこの溝部２，３を作る場合は、両面
にマスキングすることで容易に製作することができる。When creating the grooves 2 and 3 by etching, they can be easily manufactured by masking both sides.

このようにして得られたリードフレーム１は半導体素子
５を取り付けるためにアイランド部４と内部リード１１
の先端に部分メッキ。The lead frame 1 thus obtained has an island portion 4 and an internal lead 11 for attaching the semiconductor element 5.
Partially plated on the tip.

金または銀メッキを任意の厚みで施す。Gold or silver plating can be applied to any desired thickness.

この後、半導体素子５を共晶合金筐たは接着剤または半
田でダイスボンデインクし、金線まタハアルミ線でワイ
ヤがンデイング６をする。Thereafter, the semiconductor element 5 is die-bonded using a eutectic alloy case, adhesive, or solder, and wire bonding 6 is performed using gold wire or aluminum wire.

次いで、合成樹脂７．たとえば、エポキシレジンなどで
封止し、リード加工を行い、しかる後に。Next, synthetic resin 7. For example, after sealing with epoxy resin and processing the leads.

半田処理を行って電気的特性を検査した後、半導体装置
としての製品となる。After soldering and inspecting the electrical characteristics, the product is made into a semiconductor device.

以上説明したように、上記第１の実施例では。As explained above, in the first embodiment.

タブ部と内部リードの途中に溝部２．３がめるために、
封止用の合成樹脂７が成型にこの溝部２゜３に食い込み
、成型後では、密着性が向上する。In order to fit the groove part 2.3 between the tab part and the internal lead,
The synthetic resin 7 for sealing bites into this groove 2.degree. 3 during molding, and the adhesion is improved after molding.

具体的に、この溝部２，３の効果を説明すると、第１に
ロール圧延した際のロール傷１０を消す方向に溝部２が
入るから、浸入水分がこの溝部２の部分で阻止する効果
がある。Specifically, to explain the effects of the grooves 2 and 3, firstly, the grooves 2 enter in the direction to erase the roll scratches 10 during roll rolling, so the grooves 2 have the effect of blocking infiltration of moisture. .

第２に半導体素子５を取り巻くように、半導体素子５の
四面方向に溝部２，３が設けられているから、外部のい
ずれの方向からの浸入水分に対してもダムとしての効果
がある。Second, since the grooves 2 and 3 are provided on all four sides of the semiconductor element 5 so as to surround the semiconductor element 5, the grooves 2 and 3 are effective as a dam against moisture entering from outside from any direction.

・２Ｓ３に、内部リードの表裏両面に溝部２，３がある
から、四面方向の浸入水分に対しても効果がある。- Since the 2S3 has grooves 2 and 3 on both the front and back sides of the internal lead, it is effective against moisture infiltrating in all directions.

第４に、溝部２，３がるることで、熱膨張、収縮時の応
力全この溝部２，３が吸収する効果をもち、そのｉ・吉
釆、封止用の合成樹脂７とリード部８との空隙を少なく
する作用を与える。Fourthly, the presence of the grooves 2 and 3 has the effect of absorbing all the stress caused by thermal expansion and contraction, and the synthetic resin 7 for sealing and the lead portion 8 Provides the effect of reducing the air gap between the

第５に、溝部２，３を設けることで、リード部８の長さ
が（浸入水分の経路）理論的に長くなるから、半導体素
子５に到達する時間が長くなる。Fifth, by providing the grooves 2 and 3, the length of the lead portion 8 (the path of the infiltrated moisture) becomes theoretically longer, so that the time required for the lead portion 8 to reach the semiconductor element 5 becomes longer.

第６に、溝部２，３に合成樹脂７が食い込む結果、抜は
止めの効果がめる。Sixthly, as a result of the synthetic resin 7 biting into the grooves 2 and 3, there is an effect of preventing removal.

以上のように、この発明の半導体装置によれば。As described above, according to the semiconductor device of the present invention.

リードフレームのモールド内部のリード部の任意の位置
において、半導体素子を包囲するごとくに縛部を表畏に
設け、封止用の合成樹脂の成型に２の溝部に食い込むよ
うにしたので、耐湿性を向上させることができる。した
がって、高信頼性、長寿１．１１化フリ加］能となる。At any position of the lead part inside the mold of the lead frame, a binding part is provided in front so as to surround the semiconductor element, and it bites into the groove part 2 in the molding of the synthetic resin for sealing, making it moisture resistant. can be improved. Therefore, high reliability and long life can be achieved.

これにともない、高信頼性を目的とする半導体集積回路
、混成集積回路、ノ９ワートランジスタ、ダイオードの
ノＪ？ツケーソングに応用できる利点がある。Along with this, semiconductor integrated circuits, hybrid integrated circuits, 9W transistors, and diodes aimed at high reliability have been developed. It has the advantage of being applicable to music songs.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図はこの発明の半導体装置の一実施例の平面図、第
２図は第１図のＡ−に線に沿って切断して示す断面図、
第３図は第１図のＢ−Ｂ’線に沿って切断して示す断面
図でるる。 １・・・リードフレーム、２，３・・溝部、４・・アイ
ランド部、５・・・半導体素子、６・・・ワイヤデンデ
ィング、７−・・合成ｍ脂、８・・・リード部、９・・
・界面、１０　ロール傷など、１１・・・内部リード先
端部、１２・・・共晶合金。 特許出願人　　沖電気工業株式会社FIG. 1 is a plan view of an embodiment of the semiconductor device of the present invention, and FIG. 2 is a cross-sectional view taken along line A- in FIG. 1.
FIG. 3 is a sectional view taken along line BB' in FIG. 1. DESCRIPTION OF SYMBOLS 1...Lead frame, 2, 3...Groove part, 4...Island part, 5...Semiconductor element, 6...Wire ending, 7-...Synthetic resin, 8...Lead part, 9...
・Interface, 10 Roll scratches, etc., 11... Internal lead tip, 12... Eutectic alloy. Patent applicant Oki Electric Industry Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] 半導体素子を取９付けたアイランｐＨと、この半導体素
子との間にワイヤがンデイングされかつ上記アイランド
部を包囲するととくに表裏両面に溝部を有するリード部
と、上記溝部に食い込むようにして上記半導体素子を封
止する合成樹脂とよシなる半導体装置。A wire is wound between an island pH to which a semiconductor element is attached and this semiconductor element, and a lead part that surrounds the island part has a groove part on both the front and back sides, and a lead part that bites into the groove part to insert the semiconductor element. Synthetic resin for sealing and other semiconductor devices.
JP57001705A 1982-01-11 1982-01-11 Semiconductor device Pending JPS58119660A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57001705A JPS58119660A (en) 1982-01-11 1982-01-11 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57001705A JPS58119660A (en) 1982-01-11 1982-01-11 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS58119660A true JPS58119660A (en) 1983-07-16

Family

ID=11508962

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57001705A Pending JPS58119660A (en) 1982-01-11 1982-01-11 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS58119660A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS611042A (en) * 1984-06-13 1986-01-07 Toshiba Corp Semiconductor device
JPS61125162A (en) * 1984-11-22 1986-06-12 Toshiba Corp Blank for frame
JPH104170A (en) * 1996-06-14 1998-01-06 Nec Corp Lead frame

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4918591U (en) * 1972-05-19 1974-02-16
JPS5226878B1 (en) * 1972-07-03 1977-07-16

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4918591U (en) * 1972-05-19 1974-02-16
JPS5226878B1 (en) * 1972-07-03 1977-07-16

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS611042A (en) * 1984-06-13 1986-01-07 Toshiba Corp Semiconductor device
JPS61125162A (en) * 1984-11-22 1986-06-12 Toshiba Corp Blank for frame
JPH0216014B2 (en) * 1984-11-22 1990-04-13 Tokyo Shibaura Electric Co
JPH104170A (en) * 1996-06-14 1998-01-06 Nec Corp Lead frame

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