JPS58118754U - Gate turn-off thyristor with amplification gate structure - Google Patents
Gate turn-off thyristor with amplification gate structureInfo
- Publication number
- JPS58118754U JPS58118754U JP1549282U JP1549282U JPS58118754U JP S58118754 U JPS58118754 U JP S58118754U JP 1549282 U JP1549282 U JP 1549282U JP 1549282 U JP1549282 U JP 1549282U JP S58118754 U JPS58118754 U JP S58118754U
- Authority
- JP
- Japan
- Prior art keywords
- thyristor
- gto
- region
- layer
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Thyristors (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図及び第2図はそれぞれ増幅ゲート構造のGTOの
構造例を示す縦断面図、第3図は本考案の一実施例を示
す縦断面図である。
1・・・補強用タングステン板、2・・・P層(アノー
ドエミッタ)、3・・・N層、4・・・P層、5,5A
及び6・・・埋込ゲート層、7・・・P一層(カソード
ベース)、9及び10・・・カソードエミッタ、12・
・・カソードアルミ電極、13・・・ゲート電極、14
・・・アルミ配線、15・・・モリブデン板、16・・
・酸化膜。FIGS. 1 and 2 are longitudinal sectional views showing structural examples of a GTO having an amplification gate structure, respectively, and FIG. 3 is a longitudinal sectional view showing an embodiment of the present invention. 1... Tungsten plate for reinforcement, 2... P layer (anode emitter), 3... N layer, 4... P layer, 5, 5A
and 6... buried gate layer, 7... P single layer (cathode base), 9 and 10... cathode emitter, 12...
... Cathode aluminum electrode, 13 ... Gate electrode, 14
...Aluminum wiring, 15...Molybdenum plate, 16...
·Oxide film.
Claims (1)
けて補助GTO領域と主GTO領域とし、かつカソード
エミッタに接合するP層に高濃度埋込層を形成した増幅
ゲート構造のゲートターンオフサイリスタにおいて、主
GTOのカソード電極、カソードエミッタ及び高濃度埋
込層を、補助GTO領域と主GTO領域の中間の分離領
域が必要最小限となるように補助GTO方向へ延設する
とともに、カソード電極とカソードエミッタの間に延設
部分に相当する範囲で酸化膜を形成したことを特徴とす
る増幅ゲート構造のゲートターンオフサイリスタ。In a gate turn-off thyristor with an amplification gate structure, the N layer serving as the cathode emitter of the PNPN layer is divided into two to form an auxiliary GTO region and a main GTO region, and a high concentration buried layer is formed in the P layer connected to the cathode emitter. The cathode electrode, cathode emitter, and high concentration buried layer of the main GTO are extended in the direction of the auxiliary GTO so that the separation region between the auxiliary GTO region and the main GTO region is the minimum necessary, and the cathode electrode and cathode emitter are A gate turn-off thyristor having an amplification gate structure, characterized in that an oxide film is formed in an area corresponding to an extended portion between the gates.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1549282U JPS58118754U (en) | 1982-02-05 | 1982-02-05 | Gate turn-off thyristor with amplification gate structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1549282U JPS58118754U (en) | 1982-02-05 | 1982-02-05 | Gate turn-off thyristor with amplification gate structure |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58118754U true JPS58118754U (en) | 1983-08-13 |
JPS6331411Y2 JPS6331411Y2 (en) | 1988-08-22 |
Family
ID=30027914
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1549282U Granted JPS58118754U (en) | 1982-02-05 | 1982-02-05 | Gate turn-off thyristor with amplification gate structure |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58118754U (en) |
-
1982
- 1982-02-05 JP JP1549282U patent/JPS58118754U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6331411Y2 (en) | 1988-08-22 |
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