JPS58110883U - timer - Google Patents
timerInfo
- Publication number
- JPS58110883U JPS58110883U JP838482U JP838482U JPS58110883U JP S58110883 U JPS58110883 U JP S58110883U JP 838482 U JP838482 U JP 838482U JP 838482 U JP838482 U JP 838482U JP S58110883 U JPS58110883 U JP S58110883U
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- output
- inputs
- voltage
- diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electronic Switches (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の記録紙上タイムマーク表示の説明図、第
2図は本考案タイマの一実彪例の回路図、第3図は第2
図タイマによるタイムマーク表示ノ説明図である。
1:クロック発振装置、2a、 2b、 2C,2
cl逓増カウンタ、3a、 3b、 3c、 3
d、 3eH電圧分割抵抗、4a、 4b、 4
c、 4d、 4e:ダイオード、5a、 5b、
5c、 5d、 5eH抵抗、6:加算器。Fig. 1 is an explanatory diagram of a conventional time mark display on recording paper, Fig. 2 is a circuit diagram of an example of the timer of the present invention, and Fig. 3 is an explanatory diagram of a conventional time mark display on recording paper.
FIG. 2 is an explanatory diagram of time mark display by a timer. 1: Clock oscillation device, 2a, 2b, 2C, 2
cl increasing counter, 3a, 3b, 3c, 3
d, 3eH voltage division resistor, 4a, 4b, 4
c, 4d, 4e: diode, 5a, 5b,
5c, 5d, 5eH resistance, 6: Adder.
Claims (1)
抵抗で分割された電圧を入力するダイオードと、同ダイ
オードの出力を抵抗を介して入力する加算器と、上記ク
ロック発振装置の出力信号を入力する初段の逓増カウン
タと、同初段の逓増カウンタの出力を電圧分割する抵抗
と、同抵抗で分割された電圧を入力するダイオードと、
同ダイオードの出力を上記加算器に導く抵抗と、上記初
段の逓増カウンタの出力を入力する次段の逓増カウンタ
と、同次段の逓増カウンタの出力を電圧分割する抵抗と
、同抵抗′で分割された電圧を入力するダイオードと、
同ダイオニドの出力を上記加算器に導く抵抗とからなる
ことを特徴とするタイマ。A resistor that voltage divides the output signal of the clock oscillation device, a diode that inputs the voltage divided by the same resistor, an adder that inputs the output of the diode via the resistor, and an input signal that inputs the output signal of the clock oscillation device. a first-stage multiplication counter, a resistor that divides the output of the first-stage multiplication counter into voltage, and a diode that inputs the voltage divided by the same resistance.
A resistor that leads the output of the same diode to the adder, a next-stage multiplication counter that inputs the output of the first-stage multiplication counter, a resistor that divides the voltage of the output of the next-stage multiplication counter, and the same resistor'. a diode that inputs the voltage
A timer comprising a resistor that leads the output of the diionide to the adder.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP838482U JPS58110883U (en) | 1982-01-25 | 1982-01-25 | timer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP838482U JPS58110883U (en) | 1982-01-25 | 1982-01-25 | timer |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58110883U true JPS58110883U (en) | 1983-07-28 |
Family
ID=30021081
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP838482U Pending JPS58110883U (en) | 1982-01-25 | 1982-01-25 | timer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58110883U (en) |
-
1982
- 1982-01-25 JP JP838482U patent/JPS58110883U/en active Pending
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