JPS58103095U - Acoustic signal intermittent circuit - Google Patents

Acoustic signal intermittent circuit

Info

Publication number
JPS58103095U
JPS58103095U JP46382U JP46382U JPS58103095U JP S58103095 U JPS58103095 U JP S58103095U JP 46382 U JP46382 U JP 46382U JP 46382 U JP46382 U JP 46382U JP S58103095 U JPS58103095 U JP S58103095U
Authority
JP
Japan
Prior art keywords
acoustic signal
circuit
signal intermittent
intermittent circuit
configuration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP46382U
Other languages
Japanese (ja)
Other versions
JPS6239431Y2 (en
Inventor
正彦 大串
Original Assignee
ミミ−電子有限会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ミミ−電子有限会社 filed Critical ミミ−電子有限会社
Priority to JP46382U priority Critical patent/JPS58103095U/en
Publication of JPS58103095U publication Critical patent/JPS58103095U/en
Application granted granted Critical
Publication of JPS6239431Y2 publication Critical patent/JPS6239431Y2/ja
Granted legal-status Critical Current

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  • Electronic Switches (AREA)
  • Amplitude Modulation (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来の構成例の）゛ロックダイヤグラム図であ
り、第２′図は本考案の実施例のブロックダイヤグラム
図である。 １．１／：弛張発振器、ｌａ、　　ｌａ’　　：出力、
ｌｃ、　　ｌｃ’　　：入力、２．　２’　　：電子ス
イッチ、２ａ、２ａ′：制御入力、２ｂ、　　２ｂ’　
　：入力、２Ｃ。 ２Ｃ′：出力、３．　３’　　：スイッチ、３ａ、　　
３ａ’　。 ３ｂ、　３ｂ’　、　３ｃ、　３ｃ’　　：接点、４ａ
、　４ａ’　。 ４ｂ、　　４ｂ’　、　　？ａ、　７ａ’　、　７ｂ、
　　７ｂ’　　：抵抗器、５、　５’、　　６．　６’
　　：常開スイッチ。FIG. 1 is a block diagram of a conventional configuration example, and FIG. 2' is a block diagram of an embodiment of the present invention. 1.1/: relaxation oscillator, la, la': output,
lc, lc': input, 2. 2': Electronic switch, 2a, 2a': Control input, 2b, 2b'
:Input, 2C. 2C': Output, 3. 3': switch, 3a,
3a'. 3b, 3b', 3c, 3c': Contact, 4a
, 4a'. 4b, 4b', ? a, 7a', 7b,
7b': Resistor, 5, 5', 6. 6'
: Normally open switch.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 音響信号断続回路に用いる包絡信号作成回路の構成にお
いて自動断継用の弛張発振回路を設け、そのいずれかの
入力端子に正または負の直流電圧を手動スイッチを介し
て印加し、弛張発振回路の出力電位を手動で反転制御な
しうるようになしたことを特長とする音響信号断続回路
の構成。A relaxation oscillation circuit for automatic disconnection is provided in the configuration of the envelope signal generation circuit used in the acoustic signal intermittent circuit, and a positive or negative DC voltage is applied to one of its input terminals via a manual switch to activate the relaxation oscillation circuit. The configuration of an acoustic signal intermittent circuit is characterized in that the output potential can be manually reversed.
JP46382U 1982-01-06 1982-01-06 Acoustic signal intermittent circuit Granted JPS58103095U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP46382U JPS58103095U (en) 1982-01-06 1982-01-06 Acoustic signal intermittent circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP46382U JPS58103095U (en) 1982-01-06 1982-01-06 Acoustic signal intermittent circuit

Publications (2)

Publication Number Publication Date
JPS58103095U true JPS58103095U (en) 1983-07-13
JPS6239431Y2 JPS6239431Y2 (en) 1987-10-07

Family

ID=30013537

Family Applications (1)

Application Number Title Priority Date Filing Date
JP46382U Granted JPS58103095U (en) 1982-01-06 1982-01-06 Acoustic signal intermittent circuit

Country Status (1)

Country Link
JP (1) JPS58103095U (en)

Also Published As

Publication number Publication date
JPS6239431Y2 (en) 1987-10-07

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