JPS619975U - Video display tube device - Google Patents

Video display tube device

Info

Publication number
JPS619975U
JPS619975U JP9328584U JP9328584U JPS619975U JP S619975 U JPS619975 U JP S619975U JP 9328584 U JP9328584 U JP 9328584U JP 9328584 U JP9328584 U JP 9328584U JP S619975 U JPS619975 U JP S619975U
Authority
JP
Japan
Prior art keywords
video display
display tube
tube device
inverter
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9328584U
Other languages
Japanese (ja)
Other versions
JPH032941Y2 (en
Inventor
昇 吉田
Original Assignee
船井電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 船井電機株式会社 filed Critical 船井電機株式会社
Priority to JP9328584U priority Critical patent/JPS619975U/en
Publication of JPS619975U publication Critical patent/JPS619975U/en
Application granted granted Critical
Publication of JPH032941Y2 publication Critical patent/JPH032941Y2/ja
Granted legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案に係る映像表示管装置の一実施例を示す
電気回路図、第２図は従来装置の一例を示す電気回路図
である。 ２・・・パツファ回路、４・・・トランジスタ、６・・
・映像表示管、９・・・単位時間タイマ、１１・・・イ
ンパータ。FIG. 1 is an electric circuit diagram showing an embodiment of a video display tube device according to the present invention, and FIG. 2 is an electric circuit diagram showing an example of a conventional device. 2... Puffer circuit, 4... Transistor, 6...
- Video display tube, 9...unit time timer, 11...inparter.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] トランジスタ４のコレクタを映像表示管６に、またベー
スをバツファ回路２にそれそれ接続してなる映像表示管
装置において、単位時間タイマ９とインパータ１１とを
設けて、前記単位時間タイマ９の出力段にインバータ１
１を接続すると共に、該インバータ１１の出力側を前記
パツファ回路２とトランジスタ４のベースとの間に接続
したことを特徴とする映像表示管装置。In a video display tube device in which the collector of the transistor 4 is connected to the video display tube 6 and the base is connected to the buffer circuit 2, a unit time timer 9 and an inverter 11 are provided to control the output stage of the unit time timer 9. Inverter 1
1 and the output side of the inverter 11 is connected between the puffer circuit 2 and the base of the transistor 4.
JP9328584U 1984-06-21 1984-06-21 Video display tube device Granted JPS619975U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9328584U JPS619975U (en) 1984-06-21 1984-06-21 Video display tube device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9328584U JPS619975U (en) 1984-06-21 1984-06-21 Video display tube device

Publications (2)

Publication Number Publication Date
JPS619975U true JPS619975U (en) 1986-01-21
JPH032941Y2 JPH032941Y2 (en) 1991-01-25

Family

ID=30650828

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9328584U Granted JPS619975U (en) 1984-06-21 1984-06-21 Video display tube device

Country Status (1)

Country Link
JP (1) JPS619975U (en)

Also Published As

Publication number Publication date
JPH032941Y2 (en) 1991-01-25

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