JPS58100560A - デイジタル信号の復調回路 - Google Patents

デイジタル信号の復調回路

Info

Publication number
JPS58100560A
JPS58100560A JP56199207A JP19920781A JPS58100560A JP S58100560 A JPS58100560 A JP S58100560A JP 56199207 A JP56199207 A JP 56199207A JP 19920781 A JP19920781 A JP 19920781A JP S58100560 A JPS58100560 A JP S58100560A
Authority
JP
Japan
Prior art keywords
signal
circuit
terminal
period
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56199207A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6331990B2 (enrdf_load_stackoverflow
Inventor
Toshiyuki Kato
俊之 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP56199207A priority Critical patent/JPS58100560A/ja
Publication of JPS58100560A publication Critical patent/JPS58100560A/ja
Publication of JPS6331990B2 publication Critical patent/JPS6331990B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14—Demodulator circuits; Receiver circuits
    • H04L27/156—Demodulator circuits; Receiver circuits with demodulation using temporal properties of the received signal, e.g. detecting pulse width
    • H04L27/1563—Demodulator circuits; Receiver circuits with demodulation using temporal properties of the received signal, e.g. detecting pulse width using transition or level detection

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
JP56199207A 1981-12-10 1981-12-10 デイジタル信号の復調回路 Granted JPS58100560A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56199207A JPS58100560A (ja) 1981-12-10 1981-12-10 デイジタル信号の復調回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56199207A JPS58100560A (ja) 1981-12-10 1981-12-10 デイジタル信号の復調回路

Publications (2)

Publication Number Publication Date
JPS58100560A true JPS58100560A (ja) 1983-06-15
JPS6331990B2 JPS6331990B2 (enrdf_load_stackoverflow) 1988-06-28

Family

ID=16403913

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56199207A Granted JPS58100560A (ja) 1981-12-10 1981-12-10 デイジタル信号の復調回路

Country Status (1)

Country Link
JP (1) JPS58100560A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS6331990B2 (enrdf_load_stackoverflow) 1988-06-28

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