JPS5794991A - Diagnosing method for cash memory - Google Patents
Diagnosing method for cash memoryInfo
- Publication number
- JPS5794991A JPS5794991A JP55169337A JP16933780A JPS5794991A JP S5794991 A JPS5794991 A JP S5794991A JP 55169337 A JP55169337 A JP 55169337A JP 16933780 A JP16933780 A JP 16933780A JP S5794991 A JPS5794991 A JP S5794991A
- Authority
- JP
- Japan
- Prior art keywords
- data
- selt
- adr
- memory
- parts
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
Landscapes
- Memory System Of A Hierarchy Structure (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
PURPOSE:To facilitate a diagnosis of a cash memory by reading and writing data to and from the cash memory optionally as well as a normal memory. CONSTITUTION:A control register 18 is provided to output bits CACC, SELT and ADR. The bit CACC is inputted to an OR gate 14 where bit outputs of comparators 12 and 22 are passed. Further, readout outputs of address parts and data parts of cash memories 10 and 20 are led to a selector 16 to select one of those data by the bits ADR and SELT. Namely, the ADR is used to select the address part or data part, and the SELT is for the selection of the memory 10 or 20. A selector 24 for write data WD is placed in a diagnostic mode when the CACC goes up to a 1, and selects the address parts or data parts of the ememories 10 and 20 as the transfer destination of the data WD by the two bits ADR and SELT.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55169337A JPS6013497B2 (en) | 1980-12-01 | 1980-12-01 | How to diagnose cache memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55169337A JPS6013497B2 (en) | 1980-12-01 | 1980-12-01 | How to diagnose cache memory |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5794991A true JPS5794991A (en) | 1982-06-12 |
JPS6013497B2 JPS6013497B2 (en) | 1985-04-08 |
Family
ID=15884680
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55169337A Expired JPS6013497B2 (en) | 1980-12-01 | 1980-12-01 | How to diagnose cache memory |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6013497B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01318131A (en) * | 1988-06-20 | 1989-12-22 | Pfu Ltd | Error processing system for data processor |
JPH03103953A (en) * | 1989-09-19 | 1991-04-30 | Fujitsu Ltd | Cache memory testing system |
-
1980
- 1980-12-01 JP JP55169337A patent/JPS6013497B2/en not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01318131A (en) * | 1988-06-20 | 1989-12-22 | Pfu Ltd | Error processing system for data processor |
JPH03103953A (en) * | 1989-09-19 | 1991-04-30 | Fujitsu Ltd | Cache memory testing system |
Also Published As
Publication number | Publication date |
---|---|
JPS6013497B2 (en) | 1985-04-08 |
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