JPS5791037A - Multipath distortion reducing circuit - Google Patents
Multipath distortion reducing circuitInfo
- Publication number
- JPS5791037A JPS5791037A JP16653280A JP16653280A JPS5791037A JP S5791037 A JPS5791037 A JP S5791037A JP 16653280 A JP16653280 A JP 16653280A JP 16653280 A JP16653280 A JP 16653280A JP S5791037 A JPS5791037 A JP S5791037A
- Authority
- JP
- Japan
- Prior art keywords
- delay
- delay device
- delaying
- output
- detection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
- H04W52/04—TPC
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Noise Elimination (AREA)
Abstract
PURPOSE:To confirm the adjustment of delay time, by applying FM and AM detection signals delayed with each delay device delaying the FM and AM detection output signal and a delay device of 1/2 delay time, to a plane drawing display device. CONSTITUTION:A multipath distortion reducing device is provided with a variable delay device 13 delaying an output of an FM detector 7, and variable delay device 11 delaying an output of an AM detector 10 detecting an AM modulation component due to direct and reflected waves of a reception signal by the same time as the delay device 13, and variable dealy device 20 of a half delay time as both delay devices. If the direct wave is greater than the reflected wave, switches 16-19, 21-25 are connected to a contact 1, and an AM detection output and an FM detection output delayed at the delay device 20 are applied to terminals 27, 28 of a plane drawing display device 26. If the reflected wave is greater than the direct wave, the switches 16-19, 21-25 are connected to a contact 2, and the AM and FM detection outputs delayed at the delay device 20 are applied to the terminals 27, 28, to confirm if the adjustment of each delay device is complete by the display device 26.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16653280A JPS5791037A (en) | 1980-11-28 | 1980-11-28 | Multipath distortion reducing circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16653280A JPS5791037A (en) | 1980-11-28 | 1980-11-28 | Multipath distortion reducing circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5791037A true JPS5791037A (en) | 1982-06-07 |
Family
ID=15833033
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16653280A Pending JPS5791037A (en) | 1980-11-28 | 1980-11-28 | Multipath distortion reducing circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5791037A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6054532A (en) * | 1983-09-05 | 1985-03-29 | Akiyufueezu Kk | Suppressing method of multi-path distortion |
-
1980
- 1980-11-28 JP JP16653280A patent/JPS5791037A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6054532A (en) * | 1983-09-05 | 1985-03-29 | Akiyufueezu Kk | Suppressing method of multi-path distortion |
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