JPS5790760A - Data delivering method of microcomputer - Google Patents
Data delivering method of microcomputerInfo
- Publication number
- JPS5790760A JPS5790760A JP55167232A JP16723280A JPS5790760A JP S5790760 A JPS5790760 A JP S5790760A JP 55167232 A JP55167232 A JP 55167232A JP 16723280 A JP16723280 A JP 16723280A JP S5790760 A JPS5790760 A JP S5790760A
- Authority
- JP
- Japan
- Prior art keywords
- output
- data
- array
- circuit
- control gates
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/387—Information transfer, e.g. on bus using universal interface adapter for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system
Abstract
PURPOSE:To increase the range of application of an output port, by programming the function to give the code conversion into PLA for output and the function to deliver the data transmitted to a bus line and then switching these functions with the signal which is applied to a control circuit. CONSTITUTION:A programmable logic array 10 converts the data of a data transmission bus line 6 into a prescribed data. In addition to the array 10, a storage circuit 16 that stores the outputs of output control gates 18 and 19 which the output of the array 10 is applied and delivers the contents of the storage to output terminals a0-a3 is provided along with input control gates 20 and 21 set between the output of the circuit 16 and the line 6 plus a control circuit 14 that controls the output and input control gates with the signal produced by the program.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55167232A JPS5790760A (en) | 1980-11-26 | 1980-11-26 | Data delivering method of microcomputer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55167232A JPS5790760A (en) | 1980-11-26 | 1980-11-26 | Data delivering method of microcomputer |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5790760A true JPS5790760A (en) | 1982-06-05 |
Family
ID=15845893
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55167232A Pending JPS5790760A (en) | 1980-11-26 | 1980-11-26 | Data delivering method of microcomputer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5790760A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0822432A (en) * | 1993-12-23 | 1996-01-23 | Hyundai Electron Ind Co Ltd | Bus-interface logic integrated circuit |
-
1980
- 1980-11-26 JP JP55167232A patent/JPS5790760A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0822432A (en) * | 1993-12-23 | 1996-01-23 | Hyundai Electron Ind Co Ltd | Bus-interface logic integrated circuit |
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