JPS5787260A - Buffer control system - Google Patents

Buffer control system

Info

Publication number
JPS5787260A
JPS5787260A JP55163032A JP16303280A JPS5787260A JP S5787260 A JPS5787260 A JP S5787260A JP 55163032 A JP55163032 A JP 55163032A JP 16303280 A JP16303280 A JP 16303280A JP S5787260 A JPS5787260 A JP S5787260A
Authority
JP
Japan
Prior art keywords
buffer
use rate
lines
text
congestion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55163032A
Other languages
Japanese (ja)
Other versions
JPS6253102B2 (en
Inventor
Toru Ogawa
Masaaki Takano
Ryozo Sakai
Yasuo Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
KDDI Corp
Original Assignee
Fujitsu Ltd
Kokusai Denshin Denwa KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Kokusai Denshin Denwa KK filed Critical Fujitsu Ltd
Priority to JP55163032A priority Critical patent/JPS5787260A/en
Publication of JPS5787260A publication Critical patent/JPS5787260A/en
Publication of JPS6253102B2 publication Critical patent/JPS6253102B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Information Transfer Systems (AREA)

Abstract

PURPOSE:To use resources effectively to perform a flexible service, by receiving an overload text in each communication line if the overall use rate of a buffer is low and by making text congestion uniform in respective communication lines if the overall use rate becomes higher. CONSTITUTION:Normally, virtual buffer congestion control devices 41-1-41-m are used for communication lines 5-1-5-m. Texts coming from lines 5-1-5-m are controlled when the use rate of virtual assigned buffers exceeds a prescribed value, and, for exmple, 50% overload is received in comparison with the conventional buffer control system. A monitor device 6 monitors the overall use rate in actual buffer areas through a buffer control device 3; and when the use rate exceeds a predetermined value, switching devices 43-1-43-m are operated simultaneously to switch the text congestion control of lines 5-1-5-m to actual buffer congestion control devices 42-1-42-m.
JP55163032A 1980-11-19 1980-11-19 Buffer control system Granted JPS5787260A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55163032A JPS5787260A (en) 1980-11-19 1980-11-19 Buffer control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55163032A JPS5787260A (en) 1980-11-19 1980-11-19 Buffer control system

Publications (2)

Publication Number Publication Date
JPS5787260A true JPS5787260A (en) 1982-05-31
JPS6253102B2 JPS6253102B2 (en) 1987-11-09

Family

ID=15765884

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55163032A Granted JPS5787260A (en) 1980-11-19 1980-11-19 Buffer control system

Country Status (1)

Country Link
JP (1) JPS5787260A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63209347A (en) * 1987-02-26 1988-08-30 Oki Electric Ind Co Ltd Buffer assignment system for data exchange network

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63209347A (en) * 1987-02-26 1988-08-30 Oki Electric Ind Co Ltd Buffer assignment system for data exchange network

Also Published As

Publication number Publication date
JPS6253102B2 (en) 1987-11-09

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