JPS5780772A - Measuring device for semiconductor element - Google Patents

Measuring device for semiconductor element

Info

Publication number
JPS5780772A
JPS5780772A JP15588180A JP15588180A JPS5780772A JP S5780772 A JPS5780772 A JP S5780772A JP 15588180 A JP15588180 A JP 15588180A JP 15588180 A JP15588180 A JP 15588180A JP S5780772 A JPS5780772 A JP S5780772A
Authority
JP
Japan
Prior art keywords
stage
monitoring pattern
substrate
monitoring
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15588180A
Other languages
Japanese (ja)
Inventor
Hidekuni Ishida
Shigeo Furuguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15588180A priority Critical patent/JPS5780772A/en
Publication of JPS5780772A publication Critical patent/JPS5780772A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Engineering & Computer Science (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To improve the workability of a semiconductor element measuring device and to be adapted for an automation by providing a plurality of stationary substrates coindicing with an IC and monitoring pattern in a probing unit. CONSTITUTION:A wafer is placed on a stage 3' of a probing unit 4' mounted with stationary substrates 2a, 2b coinciding with an IC and a monitoring pattern. When the stage 3: is moved to contact the electrode of an IC with the multiprobe 1a of the substrate 2a, a contact signal of a probe 1a is inputted to a test unit 5' to measure the IC, thereby discriminating the propriety. When a monitoring pattern is presented in the course of measuring, the stage 3' is moved to contact the electrode of the monitoring pattern with the multiprobe 1b of the stationary substrate 2b for monitoring the pattern. In this manner, a program for the monitoring pattern associated with te unit 5' is started to collect the data. Thereafter, when the IC is again presented, the stage 3' is moved under the substrate 2a, thereby discriminating the propriety of the IC.
JP15588180A 1980-11-07 1980-11-07 Measuring device for semiconductor element Pending JPS5780772A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15588180A JPS5780772A (en) 1980-11-07 1980-11-07 Measuring device for semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15588180A JPS5780772A (en) 1980-11-07 1980-11-07 Measuring device for semiconductor element

Publications (1)

Publication Number Publication Date
JPS5780772A true JPS5780772A (en) 1982-05-20

Family

ID=15615540

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15588180A Pending JPS5780772A (en) 1980-11-07 1980-11-07 Measuring device for semiconductor element

Country Status (1)

Country Link
JP (1) JPS5780772A (en)

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