JPS5779537A - Control system for synchronizing pulse transmission - Google Patents

Abstract

PURPOSE:To obtain a variety of test clocks securely by generating desired test clocks by a receiving circuit, by transmitting continuous reference clocks from the receiving circuit and a selection signal for selecting an optical clock with respect to said reference clocks from a sending circuit by plural transmitting circuits. CONSTITUTION:A sending circuit 10 outputs a clock output (c) from a clock transmitter 11 to a transmitting gate 14-0 and a clock controlling circuit 12, which transmits a selection signal (b) from a single/continuous commanding circuit 13 to transmitting gates 14-1-14-n for the purpose of a test. In a receiving circuit 30, the clock (c) is inputted to all receiving gates 31-1-31-n, and the selection signals b-1-b-n are inputted to the receiving gates 31-1-31-n, which connect with (n-1) untis of corresponding delay circuits DL-2-DL-n. Consequently, the phase of the clock outputted by the receiving gate 31-1 is X, the phases of the output clocks of the delay circuits DL2-DLn are X+DL2-X+DLn.