JPS5624839A - Level monitor system for frequency multiplex end office device - Google Patents

Level monitor system for frequency multiplex end office device

Info

Publication number
JPS5624839A
JPS5624839A JP10145979A JP10145979A JPS5624839A JP S5624839 A JPS5624839 A JP S5624839A JP 10145979 A JP10145979 A JP 10145979A JP 10145979 A JP10145979 A JP 10145979A JP S5624839 A JPS5624839 A JP S5624839A
Authority
JP
Japan
Prior art keywords
level monitor
level
monitor
monitor system
end office
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10145979A
Other languages
Japanese (ja)
Other versions
JPS6322100B2 (en
Inventor
Kimihiro Ishitobi
Shiyoji Ooyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP10145979A priority Critical patent/JPS5624839A/en
Publication of JPS5624839A publication Critical patent/JPS5624839A/en
Publication of JPS6322100B2 publication Critical patent/JPS6322100B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J1/00—Frequency-division multiplex systems
    • H04J1/02—Details
    • H04J1/16—Monitoring arrangements

Abstract

PURPOSE:To facilitate an eacy monitor for several levels by selecting successively the level monitor output according to the selection signal sent from the gate synchronizing circuit. CONSTITUTION:Level monitor outputs 1a-1n are supplied to level meter 10 via gate circuits 2a-2n, level monitor switching circuit 7, filters 8a-8l and coupling circuits 9 each. Gate synchronizing circuit 6 generates the selection signals to give the control to gates 2a-2n plus circuits 7 and 9 each. With this selection signal, the level monitor output is selected successively to facilitate an easy monitor for several levels by one unit of the level meter.
JP10145979A 1979-08-08 1979-08-08 Level monitor system for frequency multiplex end office device Granted JPS5624839A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10145979A JPS5624839A (en) 1979-08-08 1979-08-08 Level monitor system for frequency multiplex end office device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10145979A JPS5624839A (en) 1979-08-08 1979-08-08 Level monitor system for frequency multiplex end office device

Publications (2)

Publication Number Publication Date
JPS5624839A true JPS5624839A (en) 1981-03-10
JPS6322100B2 JPS6322100B2 (en) 1988-05-10

Family

ID=14301276

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10145979A Granted JPS5624839A (en) 1979-08-08 1979-08-08 Level monitor system for frequency multiplex end office device

Country Status (1)

Country Link
JP (1) JPS5624839A (en)

Also Published As

Publication number Publication date
JPS6322100B2 (en) 1988-05-10

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