JPS5778130A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5778130A
JPS5778130A JP55154356A JP15435680A JPS5778130A JP S5778130 A JPS5778130 A JP S5778130A JP 55154356 A JP55154356 A JP 55154356A JP 15435680 A JP15435680 A JP 15435680A JP S5778130 A JPS5778130 A JP S5778130A
Authority
JP
Japan
Prior art keywords
substrate
semiconductor
type layer
type
cluster
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55154356A
Other languages
Japanese (ja)
Inventor
Shunpei Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HANDOUTAI ENERUGII KENKYUSHO KK
Semiconductor Energy Laboratory Co Ltd
Original Assignee
HANDOUTAI ENERUGII KENKYUSHO KK
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HANDOUTAI ENERUGII KENKYUSHO KK, Semiconductor Energy Laboratory Co Ltd filed Critical HANDOUTAI ENERUGII KENKYUSHO KK
Priority to JP55154356A priority Critical patent/JPS5778130A/en
Publication of JPS5778130A publication Critical patent/JPS5778130A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/02546Arsenides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To obtain a nivel semiconductor device by forming an MIS, PN, PIN, PI or NI type junction or multiple junctions thereof in an amorphous semiconductor having a columnar cluster configuration on the surface. CONSTITUTION:A mixture gas obtained by diluting 10-100% of SiF4 with He in a bomb, and a mixture gas obtained by mixing 0.01-5mol% of impurity for determining the conductive type with 1-100% of silicide gas in another bomb, are introduced onto a substrate installed in a reaction system having 0.001-10 Torr, energy of 0.1-10GHz and 10-1,000W is applied to the reaction system to react the substrate at 100-400 deg.C, an electrode 54 and further an N type layer 53, an I type layer 52 and P<+> type layer 51 (with amorphous semiconductor) are superposed on the substrate 10, and a pectinated electrode 52 is attached thereto. At this time a planar cluster is initially mainly grown, a columnar cluster is vertically grown on the upper layer, a PI junction is formed on the surface of the semiconductor isolated from the substrate, electrons and holes generated on the light emitted surface are efficiently led to the electrodes 52, 54, the conversion efficiency is improved by 3-5 times of the case of the conventional amorphous, and the thickness of the semiconductor can be reduced to 1/10-1/30 of the single crystal.
JP55154356A 1980-11-01 1980-11-01 Semiconductor device Pending JPS5778130A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55154356A JPS5778130A (en) 1980-11-01 1980-11-01 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55154356A JPS5778130A (en) 1980-11-01 1980-11-01 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5778130A true JPS5778130A (en) 1982-05-15

Family

ID=15582362

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55154356A Pending JPS5778130A (en) 1980-11-01 1980-11-01 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5778130A (en)

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