JPS577602A - Fet amplifying circuit - Google Patents

Fet amplifying circuit

Info

Publication number
JPS577602A
JPS577602A JP8189380A JP8189380A JPS577602A JP S577602 A JPS577602 A JP S577602A JP 8189380 A JP8189380 A JP 8189380A JP 8189380 A JP8189380 A JP 8189380A JP S577602 A JPS577602 A JP S577602A
Authority
JP
Japan
Prior art keywords
signal
current
input signal
circuit
fet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8189380A
Other languages
Japanese (ja)
Inventor
Yoshio Uchiumi
Yasutake Satou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP8189380A priority Critical patent/JPS577602A/en
Publication of JPS577602A publication Critical patent/JPS577602A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3205—Modifications of amplifiers to reduce non-linear distortion in field-effect transistor amplifiers

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To obtain an output signal linear to an input signal by obtaining the output signal from the difference signal of the normal-characteristic drain current of an FET amplifying the input signal and the reverse-characteristic drain current of an FET amplifying an inverted input signal. CONSTITUTION:An input signal Vi is inputted to an FET normal-transfer characteristic amplifying circuit 10 outputting a current shown by equation I and the FET16 of an input signal inverting circuit 14. Then, the inverted signal of -Vi is obtained from an FET24 having the same characteristics as those of the FET16. An FET reverse-transfer-characteristic circuit 37 consisting of an FET36 inputting the inverted signal and a current Miller circuit 34 outputs a current shown by equation II. The FETs 36 and 12 have the same characteristics, and the current flowing to the point P of an output circuit 38 with a constant-current source 40 is shown by the difference between the equations I and II. Therefore, an output with excellent linearity including no nonlinear element is obtained as the output across voltage Vo of a load resistance 40.
JP8189380A 1980-06-17 1980-06-17 Fet amplifying circuit Pending JPS577602A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8189380A JPS577602A (en) 1980-06-17 1980-06-17 Fet amplifying circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8189380A JPS577602A (en) 1980-06-17 1980-06-17 Fet amplifying circuit

Publications (1)

Publication Number Publication Date
JPS577602A true JPS577602A (en) 1982-01-14

Family

ID=13759115

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8189380A Pending JPS577602A (en) 1980-06-17 1980-06-17 Fet amplifying circuit

Country Status (1)

Country Link
JP (1) JPS577602A (en)

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