JPS5773962A - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit deviceInfo
- Publication number
- JPS5773962A JPS5773962A JP10082881A JP10082881A JPS5773962A JP S5773962 A JPS5773962 A JP S5773962A JP 10082881 A JP10082881 A JP 10082881A JP 10082881 A JP10082881 A JP 10082881A JP S5773962 A JPS5773962 A JP S5773962A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- resistance element
- input terminal
- separation region
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title 1
- 238000000926 separation method Methods 0.000 abstract 4
- 230000001681 protective effect Effects 0.000 abstract 3
- 238000009792 diffusion process Methods 0.000 abstract 1
- 230000000694 effects Effects 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 230000003071 parasitic effect Effects 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0288—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Bipolar Transistors (AREA)
- Semiconductor Integrated Circuits (AREA)
- Bipolar Integrated Circuits (AREA)
Abstract
PURPOSE:To prevent failure of circuits by a device wherein a protective resistance element for a multi-power source circuit is independently formed in an insulative separation region and one of resistance terminals is connected to the separation region to serve as an input terminal, thereby to maintain a constant resistance value irrespective of power potential. CONSTITUTION:In a circuit using two or more power sources, a protective resistance element is serially inserted at an input terminal of the circuit. In case of a circuit formed of an n-P-N transistor, for example, an N type diffusion layer 8 is formed in a P type substrate 7 as a separation region and then, a P type region 9 is formed within the layer 8 under the base process to constitute a protective resistance element. This resistance element is formed in the number of one for each separation region. One terminal 11 of the resistance element is connected to the region 8 to constitute an input terminal, while the other terminal 12 thereof is connected to an input terminal of a CML circuit or the like. By so doing, even when the power source supplying the highest potential is disconnected, there occurs no parasitic transistor effect. Thus, a resistance value of the element can be maintained at a constant level and hence, failure due to the excessive current can be prevented positively.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56100828A JPS5937582B2 (en) | 1981-06-29 | 1981-06-29 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56100828A JPS5937582B2 (en) | 1981-06-29 | 1981-06-29 | Semiconductor integrated circuit device |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5494072A Division JPS4911588A (en) | 1972-06-01 | 1972-06-01 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11017584A Division JPS6035555A (en) | 1984-05-30 | 1984-05-30 | Semiconductor integrated circuit device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5773962A true JPS5773962A (en) | 1982-05-08 |
JPS5937582B2 JPS5937582B2 (en) | 1984-09-11 |
Family
ID=14284178
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56100828A Expired JPS5937582B2 (en) | 1981-06-29 | 1981-06-29 | Semiconductor integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5937582B2 (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3491274A (en) * | 1965-06-04 | 1970-01-20 | Centre Electron Horloger | Diffused resistance in an integrated circuit |
-
1981
- 1981-06-29 JP JP56100828A patent/JPS5937582B2/en not_active Expired
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3491274A (en) * | 1965-06-04 | 1970-01-20 | Centre Electron Horloger | Diffused resistance in an integrated circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS5937582B2 (en) | 1984-09-11 |
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