JPS5769456A - Microprogram controller - Google Patents
Microprogram controllerInfo
- Publication number
- JPS5769456A JPS5769456A JP14428480A JP14428480A JPS5769456A JP S5769456 A JPS5769456 A JP S5769456A JP 14428480 A JP14428480 A JP 14428480A JP 14428480 A JP14428480 A JP 14428480A JP S5769456 A JPS5769456 A JP S5769456A
- Authority
- JP
- Japan
- Prior art keywords
- latch
- contents
- request
- branch
- condition
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
- G06F9/262—Arrangements for next microinstruction selection
- G06F9/264—Microinstruction selection based on results of processing
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
Abstract
PURPOSE:To recognize the contents of a latch from a program controller optionally without varying the contents and to utilize the contents as a branch condition at the same time, by using a scanning circuit for a latch group, determining the condition of the branch of microinstructions using an external processor and the program controller in common. CONSTITUTION:A latch group 6(6') determining the condition of the branch of microinstructions is provided, and the latch group is provided with a scanning circuit which is scanned out from an external processor, such as a service processor SVP. An address selecting circuit 7 discriminating between a readout request for a latch from the address of a control storage 1 and that from the address of the external processor selects a specific latch. Its contents are sent to a coresponding request origin through a gate 13 for the request of the controller or a gate 12 for the request of the external device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14428480A JPS5769456A (en) | 1980-10-17 | 1980-10-17 | Microprogram controller |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14428480A JPS5769456A (en) | 1980-10-17 | 1980-10-17 | Microprogram controller |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5769456A true JPS5769456A (en) | 1982-04-28 |
JPS6136659B2 JPS6136659B2 (en) | 1986-08-19 |
Family
ID=15358491
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14428480A Granted JPS5769456A (en) | 1980-10-17 | 1980-10-17 | Microprogram controller |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5769456A (en) |
-
1980
- 1980-10-17 JP JP14428480A patent/JPS5769456A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6136659B2 (en) | 1986-08-19 |
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