JPS57669B2 - - Google Patents

Info

Publication number
JPS57669B2
JPS57669B2 JP11116479A JP11116479A JPS57669B2 JP S57669 B2 JPS57669 B2 JP S57669B2 JP 11116479 A JP11116479 A JP 11116479A JP 11116479 A JP11116479 A JP 11116479A JP S57669 B2 JPS57669 B2 JP S57669B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP11116479A
Other languages
Japanese (ja)
Other versions
JPS5642375A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11116479A priority Critical patent/JPS5642375A/ja
Priority to EP80302964A priority patent/EP0025311A3/en
Priority to CA000359378A priority patent/CA1142646A/en
Publication of JPS5642375A publication Critical patent/JPS5642375A/ja
Publication of JPS57669B2 publication Critical patent/JPS57669B2/ja
Priority to US06/859,237 priority patent/US5101249A/en
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H10D30/684—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection
    • H10D30/686—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection using hot carriers produced by avalanche breakdown of PN junctions, e.g. floating gate avalanche injection MOS [FAMOS]

Landscapes

  • Non-Volatile Memory (AREA)
JP11116479A 1979-08-31 1979-08-31 Semiconductor nonvolatile memory Granted JPS5642375A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP11116479A JPS5642375A (en) 1979-08-31 1979-08-31 Semiconductor nonvolatile memory
EP80302964A EP0025311A3 (en) 1979-08-31 1980-08-27 Non-volatile semiconductor memory device
CA000359378A CA1142646A (en) 1979-08-31 1980-08-29 Nonvolatile semiconductor memory device
US06/859,237 US5101249A (en) 1979-08-31 1986-05-06 Nonvolatile semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11116479A JPS5642375A (en) 1979-08-31 1979-08-31 Semiconductor nonvolatile memory

Publications (2)

Publication Number Publication Date
JPS5642375A JPS5642375A (en) 1981-04-20
JPS57669B2 true JPS57669B2 (OSRAM) 1982-01-07

Family

ID=14554093

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11116479A Granted JPS5642375A (en) 1979-08-31 1979-08-31 Semiconductor nonvolatile memory

Country Status (4)

Country Link
US (1) US5101249A (OSRAM)
EP (1) EP0025311A3 (OSRAM)
JP (1) JPS5642375A (OSRAM)
CA (1) CA1142646A (OSRAM)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4336603A (en) * 1980-06-18 1982-06-22 International Business Machines Corp. Three terminal electrically erasable programmable read only memory
JPS5836506B2 (ja) * 1980-11-20 1983-08-09 富士通株式会社 半導体記憶装置
US4939559A (en) * 1981-12-14 1990-07-03 International Business Machines Corporation Dual electron injector structures using a conductive oxide between injectors
US4490900A (en) * 1982-01-29 1985-01-01 Seeq Technology, Inc. Method of fabricating an MOS memory array having electrically-programmable and electrically-erasable storage devices incorporated therein
JP2515715B2 (ja) * 1984-02-24 1996-07-10 株式会社日立製作所 半導体集積回路装置の製造方法
JPH0777240B2 (ja) * 1989-01-20 1995-08-16 富士通株式会社 半導体装置の製造方法
US5258095A (en) * 1989-01-20 1993-11-02 Fujitsu Limited Method for producing a device having an insulator sandwiched between two semiconductor layers
DE69033262T2 (de) 1989-04-13 2000-02-24 Sandisk Corp., Santa Clara EEPROM-Karte mit Austauch von fehlerhaften Speicherzellen und Zwischenspeicher
GB9113795D0 (en) * 1991-06-26 1991-08-14 Philips Electronic Associated Thin-film rom devices and their manufacture
US5495121A (en) * 1991-09-30 1996-02-27 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP3236706B2 (ja) * 1993-07-30 2001-12-10 三菱電機株式会社 不揮発性半導体記憶装置およびその製造方法
US6753568B1 (en) 1996-11-15 2004-06-22 Hitachi, Ltd. Memory device
EP0843360A1 (en) * 1996-11-15 1998-05-20 Hitachi Europe Limited Memory device
US6121654A (en) * 1997-10-10 2000-09-19 The Research Foundation Of State University Of New York Memory device having a crested tunnel barrier
US20040021170A1 (en) * 1999-03-24 2004-02-05 Caywood John M. Method and apparatus for injecting charge onto the floating gate of a nonvolatile memory cell
US6384451B1 (en) 1999-03-24 2002-05-07 John Caywood Method and apparatus for injecting charge onto the floating gate of a nonvolatile memory cell
US6534816B1 (en) * 1999-03-24 2003-03-18 John M. Caywood Method and apparatus for injecting charge onto the floating gate of a nonvolatile memory cell
US6586797B2 (en) * 2001-08-30 2003-07-01 Micron Technology, Inc. Graded composition gate insulators to reduce tunneling barriers in flash memory devices
TWI244166B (en) * 2004-03-11 2005-11-21 Ememory Technology Inc A non-volatile memory cell and fabricating method thereof
US20050242387A1 (en) * 2004-04-29 2005-11-03 Micron Technology, Inc. Flash memory device having a graded composition, high dielectric constant gate insulator
US7612403B2 (en) * 2005-05-17 2009-11-03 Micron Technology, Inc. Low power non-volatile memory and gate stack
US7880217B2 (en) * 2005-07-30 2011-02-01 Taiwan Semiconductor Manufacturing Co., Ltd. Programmable non-volatile memory (PNVM) device
US8110469B2 (en) 2005-08-30 2012-02-07 Micron Technology, Inc. Graded dielectric layers
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3660819A (en) * 1970-06-15 1972-05-02 Intel Corp Floating gate transistor and method for charging and discharging same
US3878549A (en) * 1970-10-27 1975-04-15 Shumpei Yamazaki Semiconductor memories
US3856587A (en) * 1971-03-26 1974-12-24 Co Yamazaki Kogyo Kk Method of fabricating semiconductor memory device gate
US3984822A (en) * 1974-12-30 1976-10-05 Intel Corporation Double polycrystalline silicon gate memory device
US4104675A (en) * 1977-06-21 1978-08-01 International Business Machines Corporation Moderate field hole and electron injection from one interface of MIM or MIS structures
DE2832388C2 (de) * 1978-07-24 1986-08-14 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Herstellen von MNOS- und MOS-Transistoren in Silizium-Gate-Technologie auf einem Halbleitersubstrat
US4217601A (en) * 1979-02-15 1980-08-12 International Business Machines Corporation Non-volatile memory devices fabricated from graded or stepped energy band gap insulator MIM or MIS structure

Also Published As

Publication number Publication date
CA1142646A (en) 1983-03-08
JPS5642375A (en) 1981-04-20
EP0025311A2 (en) 1981-03-18
EP0025311A3 (en) 1982-07-14
US5101249A (en) 1992-03-31

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