JPS5763957A - Mfm demodulating circuit - Google Patents

Mfm demodulating circuit

Info

Publication number
JPS5763957A
JPS5763957A JP13881080A JP13881080A JPS5763957A JP S5763957 A JPS5763957 A JP S5763957A JP 13881080 A JP13881080 A JP 13881080A JP 13881080 A JP13881080 A JP 13881080A JP S5763957 A JPS5763957 A JP S5763957A
Authority
JP
Japan
Prior art keywords
intervals
mfm
demodulation
voltage
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13881080A
Other languages
Japanese (ja)
Inventor
Yasunori Kanazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13881080A priority Critical patent/JPS5763957A/en
Publication of JPS5763957A publication Critical patent/JPS5763957A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4904—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes

Abstract

PURPOSE:To achieve simple, stable MFM demodulation even at a high data transfer rate without using any clock for demodulation, by measuring the intervals of data pulses by a means of transducing time into a voltage. CONSTITUTION:An MFM signal applied to an input terminal 1 is divided into two; one is applied to a differentiating circuit 3 after phase inversion, and the other is applied to the circuit directly to extract the leading or trailing edge of the MFM signal, which is applied to a ramp function generating circuit 4, so that intervals A1, B1 and C1 between data pulses are voltage peak values A2, B2 and C2 of a ramp function. Those outputs are applied to voltage comparators 5-7 for level comparisions and detection is performed by AND circuits 8, 10 and 12 to measure the said intervals A1, B1 and C1 at terminals A, B and C. Thus, the intervals A1, B1 and C1 are measured without using any clock for demodulation.
JP13881080A 1980-10-06 1980-10-06 Mfm demodulating circuit Pending JPS5763957A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13881080A JPS5763957A (en) 1980-10-06 1980-10-06 Mfm demodulating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13881080A JPS5763957A (en) 1980-10-06 1980-10-06 Mfm demodulating circuit

Publications (1)

Publication Number Publication Date
JPS5763957A true JPS5763957A (en) 1982-04-17

Family

ID=15230763

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13881080A Pending JPS5763957A (en) 1980-10-06 1980-10-06 Mfm demodulating circuit

Country Status (1)

Country Link
JP (1) JPS5763957A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0141028A2 (en) * 1983-10-25 1985-05-15 BULL HN INFORMATION SYSTEMS ITALIA S.p.A. Digital apparatus for magnetic media data recovery system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0141028A2 (en) * 1983-10-25 1985-05-15 BULL HN INFORMATION SYSTEMS ITALIA S.p.A. Digital apparatus for magnetic media data recovery system

Similar Documents

Publication Publication Date Title
ATE3170T1 (en) CIRCUIT FOR DETERMINING THE PHASE JITTER OF DIGITAL SIGNALS AND THEIR USE.
JPS5748845A (en) Data signal detecting circuit
JPS554149A (en) Fixed mark testing circuit
JPS5763957A (en) Mfm demodulating circuit
JPS5776456A (en) Detection of rotating speed
JPS54100652A (en) Sampler
JPS5752815A (en) Processing circuit for ultrasonic wave signal
JPS5572225A (en) Improper timing detection circuit
JPS55150628A (en) Light signal receiving unit
JPS5313962A (en) Frequency detecting method
JPS53102008A (en) Demodulation circuit
JPS54124612A (en) Receiving data detector circuit in data transmission
JPS5623065A (en) Demodulation circuit for self clocking information signal
SU580635A1 (en) Frequency multiplier
JPS55110456A (en) Modulation method for digital signal and its modulation circuit
JPS57141143A (en) Intercode interference detecting circuit
JPS5387713A (en) Demodulation circuit
JPS528869A (en) Amplitude differential detectio circuit
JPS5372411A (en) Signal transmission system
JPS5315168A (en) Pulse separation measuring system
GB937454A (en) Improvements relating to electronic apparatus for indicating variations in the lengths of time intervals between pulses
JPS5418782A (en) Surface electrometer
JPS5627581A (en) Signal processor
JPS5333691A (en) Measurement of alternating current corrosion
JPS5240172A (en) Mean value detection circuit