JPS5760448A - System operation system - Google Patents

System operation system

Info

Publication number
JPS5760448A
JPS5760448A JP55136232A JP13623280A JPS5760448A JP S5760448 A JPS5760448 A JP S5760448A JP 55136232 A JP55136232 A JP 55136232A JP 13623280 A JP13623280 A JP 13623280A JP S5760448 A JPS5760448 A JP S5760448A
Authority
JP
Japan
Prior art keywords
firmware
controlling circuit
processing
service
started
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55136232A
Other languages
Japanese (ja)
Inventor
Toshimitsu Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55136232A priority Critical patent/JPS5760448A/en
Publication of JPS5760448A publication Critical patent/JPS5760448A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/273—Tester hardware, i.e. output processing circuits
    • G06F11/277—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault-free response

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To prevent a service error, by adding a designated memory area when a data processing system has been started, comparing and collating said result and detecting a fault of the firmware before the system is operated. CONSTITUTION:When a service start request, that is to say, an electric power supply turn-on information is inputted to a processing controlling circuit 2 from an electric power supply controlling circuit 1, the processing controlling circuit 2 outputs a program from a memory part 3 and starts the processing. In this case, the firmware part incorporated in the memory part 3 adds independently the whole contents of a designated memory area, checks and compares them with a key input information from an operation 4, and in case of coincidence, the firmware is decided to be normal and an offer of service is started.
JP55136232A 1980-09-30 1980-09-30 System operation system Pending JPS5760448A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55136232A JPS5760448A (en) 1980-09-30 1980-09-30 System operation system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55136232A JPS5760448A (en) 1980-09-30 1980-09-30 System operation system

Publications (1)

Publication Number Publication Date
JPS5760448A true JPS5760448A (en) 1982-04-12

Family

ID=15170366

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55136232A Pending JPS5760448A (en) 1980-09-30 1980-09-30 System operation system

Country Status (1)

Country Link
JP (1) JPS5760448A (en)

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