JPS5757310A - Numerical controller incorporating address stop function - Google Patents

Numerical controller incorporating address stop function

Info

Publication number
JPS5757310A
JPS5757310A JP55133332A JP13333280A JPS5757310A JP S5757310 A JPS5757310 A JP S5757310A JP 55133332 A JP55133332 A JP 55133332A JP 13333280 A JP13333280 A JP 13333280A JP S5757310 A JPS5757310 A JP S5757310A
Authority
JP
Japan
Prior art keywords
address
stop function
processor
numerical controller
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55133332A
Other languages
Japanese (ja)
Inventor
Mitsuo Kurakake
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fanuc Corp
Original Assignee
Fanuc Corp
Fujitsu Fanuc Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fanuc Corp, Fujitsu Fanuc Ltd filed Critical Fanuc Corp
Priority to JP55133332A priority Critical patent/JPS5757310A/en
Priority to PCT/JP1981/000244 priority patent/WO1982001266A1/en
Priority to KR1019810003553A priority patent/KR830008229A/en
Publication of JPS5757310A publication Critical patent/JPS5757310A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/362—Debugging of software
    • G06F11/3636—Debugging of software by tracing the execution of the program
    • G06F11/364—Debugging of software by tracing the execution of the program tracing values on a bus
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B23/00—Testing or monitoring of control systems or parts thereof
    • G05B23/02—Electric testing or monitoring
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/362—Debugging of software
    • G06F11/3648—Debugging of software using additional hardware

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Automation & Control Theory (AREA)
  • Numerical Control (AREA)
  • Testing And Monitoring For Control Systems (AREA)

Abstract

PURPOSE:To ensure an early detection of a fault due to an error of the software, by providing an address stop function to a numerical controller. CONSTITUTION:An address register 10 stores a specific one of the addresses to which a processor that performs a data process for the numerical control gives an access. The contents of the register 10 can freely be set through a data bus 30, and this output is applied to a terminal of an address coincidence detecting circuit 20. The circuit 20 compares this output with the address output of the processor which is applied to the other terminal of the circuit 20. When a coincidence is obtained through this comparison, a coincidence signal is delivered by the circuit 20 to apply the interruption to the processor. Then the processor carries out a program of an upper level to detect a fault due to a software error. In such a way, an address stop function is provided to a numerical controller to ensure an early detection of a fault due to a softwre error.
JP55133332A 1980-09-25 1980-09-25 Numerical controller incorporating address stop function Pending JPS5757310A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP55133332A JPS5757310A (en) 1980-09-25 1980-09-25 Numerical controller incorporating address stop function
PCT/JP1981/000244 WO1982001266A1 (en) 1980-09-25 1981-09-21 Numerical control unit with address-stop function
KR1019810003553A KR830008229A (en) 1980-09-25 1981-09-23 Numerical control unit with address stop function

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55133332A JPS5757310A (en) 1980-09-25 1980-09-25 Numerical controller incorporating address stop function

Publications (1)

Publication Number Publication Date
JPS5757310A true JPS5757310A (en) 1982-04-06

Family

ID=15102234

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55133332A Pending JPS5757310A (en) 1980-09-25 1980-09-25 Numerical controller incorporating address stop function

Country Status (3)

Country Link
JP (1) JPS5757310A (en)
KR (1) KR830008229A (en)
WO (1) WO1982001266A1 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4943543A (en) * 1972-08-29 1974-04-24

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50144886A (en) * 1974-05-13 1975-11-20

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4943543A (en) * 1972-08-29 1974-04-24

Also Published As

Publication number Publication date
KR830008229A (en) 1983-11-16
WO1982001266A1 (en) 1982-04-15

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