JPS5751732B2 - - Google Patents
Info
- Publication number
- JPS5751732B2 JPS5751732B2 JP48105860A JP10586073A JPS5751732B2 JP S5751732 B2 JPS5751732 B2 JP S5751732B2 JP 48105860 A JP48105860 A JP 48105860A JP 10586073 A JP10586073 A JP 10586073A JP S5751732 B2 JPS5751732 B2 JP S5751732B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/04—Apparatus for manufacture or treatment
- H10P72/0446—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/421—Shapes or dispositions
- H10W70/438—Shapes or dispositions of side rails, e.g. having holes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/453—Leadframes comprising flexible metallic tapes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/464—Additional interconnections in combination with leadframes
- H10W70/468—Circuit boards
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/077—Connecting of TAB connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07331—Connecting techniques
- H10W72/07336—Soldering or alloying
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Wire Bonding (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US320349A US3859718A (en) | 1973-01-02 | 1973-01-02 | Method and apparatus for the assembly of semiconductor devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS4999477A JPS4999477A (https=) | 1974-09-19 |
| JPS5751732B2 true JPS5751732B2 (https=) | 1982-11-04 |
Family
ID=23246002
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP48105860A Expired JPS5751732B2 (https=) | 1973-01-02 | 1973-09-19 | |
| JP57037882A Pending JPS57164556A (en) | 1973-01-02 | 1982-03-10 | Semiconductor integrated circuit assembly |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57037882A Pending JPS57164556A (en) | 1973-01-02 | 1982-03-10 | Semiconductor integrated circuit assembly |
Country Status (14)
| Country | Link |
|---|---|
| US (1) | US3859718A (https=) |
| JP (2) | JPS5751732B2 (https=) |
| KR (1) | KR780000595B1 (https=) |
| BR (1) | BR7309074D0 (https=) |
| CA (1) | CA1086430A (https=) |
| DD (1) | DD107812A5 (https=) |
| DE (1) | DE2363833C2 (https=) |
| FR (1) | FR2212642B1 (https=) |
| GB (1) | GB1447524A (https=) |
| HU (1) | HU167861B (https=) |
| IT (1) | IT991996B (https=) |
| PH (1) | PH9927A (https=) |
| PL (1) | PL87007B1 (https=) |
| RO (1) | RO64695A (https=) |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3949925A (en) * | 1974-10-03 | 1976-04-13 | The Jade Corporation | Outer lead bonder |
| CA1052912A (en) * | 1975-07-07 | 1979-04-17 | National Semiconductor Corporation | Gang bonding interconnect tape for semiconductive devices and method of making same |
| US4099660A (en) * | 1975-10-31 | 1978-07-11 | National Semiconductor Corporation | Apparatus for and method of shaping interconnect leads |
| US4166562A (en) * | 1977-09-01 | 1979-09-04 | The Jade Corporation | Assembly system for microcomponent devices such as semiconductor devices |
| US4330790A (en) * | 1980-03-24 | 1982-05-18 | National Semiconductor Corporation | Tape operated semiconductor device packaging |
| WO1982001803A1 (en) * | 1980-11-07 | 1982-05-27 | Mulholland Wayne A | Multiple terminal two conductor layer burn-in tape |
| US4331831A (en) * | 1980-11-28 | 1982-05-25 | Bell Telephone Laboratories, Incorporated | Package for semiconductor integrated circuits |
| US4409733A (en) * | 1981-01-26 | 1983-10-18 | Integrated Machine Development | Means and method for processing integrated circuit element |
| GB2124433B (en) * | 1982-07-07 | 1986-05-21 | Int Standard Electric Corp | Electronic component assembly |
| US4754912A (en) * | 1984-04-05 | 1988-07-05 | National Semiconductor Corporation | Controlled collapse thermocompression gang bonding |
| JPS60229345A (ja) * | 1984-04-27 | 1985-11-14 | Toshiba Corp | 半導体装置 |
| DE3686990T2 (de) * | 1985-08-23 | 1993-04-22 | Nippon Electric Co | Verfahren zum herstellen einer halbleiteranordnung wobei ein filmtraegerband angewendet wird. |
| FR2590052B1 (fr) * | 1985-11-08 | 1991-03-01 | Eurotechnique Sa | Procede de recyclage d'une carte comportant un composant, carte prevue pour etre recyclee |
| US5038453A (en) * | 1988-07-22 | 1991-08-13 | Rohm Co., Ltd. | Method of manufacturing semiconductor devices, and leadframe and differential overlapping apparatus therefor |
| US4985988A (en) * | 1989-11-03 | 1991-01-22 | Motorola, Inc. | Method for assembling, testing, and packaging integrated circuits |
| US5528397A (en) * | 1991-12-03 | 1996-06-18 | Kopin Corporation | Single crystal silicon transistors for display panels |
| US6087195A (en) | 1998-10-15 | 2000-07-11 | Handy & Harman | Method and system for manufacturing lamp tiles |
| JP5167779B2 (ja) * | 2007-11-16 | 2013-03-21 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
| US20160056095A1 (en) * | 2014-08-25 | 2016-02-25 | Infineon Technologies Ag | Leadframe Strip with Sawing Enhancement Feature |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3544857A (en) * | 1966-08-16 | 1970-12-01 | Signetics Corp | Integrated circuit assembly with lead structure and method |
| US3442432A (en) * | 1967-06-15 | 1969-05-06 | Western Electric Co | Bonding a beam-leaded device to a substrate |
| US3689991A (en) * | 1968-03-01 | 1972-09-12 | Gen Electric | A method of manufacturing a semiconductor device utilizing a flexible carrier |
| US3698074A (en) * | 1970-06-29 | 1972-10-17 | Motorola Inc | Contact bonding and packaging of integrated circuits |
| US3698073A (en) * | 1970-10-13 | 1972-10-17 | Motorola Inc | Contact bonding and packaging of integrated circuits |
| US3793714A (en) * | 1971-05-27 | 1974-02-26 | Texas Instruments Inc | Integrated circuit assembly using etched metal patterns of flexible insulating film |
-
1973
- 1973-01-02 US US320349A patent/US3859718A/en not_active Expired - Lifetime
- 1973-07-23 CA CA177,075A patent/CA1086430A/en not_active Expired
- 1973-08-01 IT IT51785/73A patent/IT991996B/it active
- 1973-08-20 DD DD173056A patent/DD107812A5/xx unknown
- 1973-08-31 HU HUTE737A patent/HU167861B/hu unknown
- 1973-09-19 JP JP48105860A patent/JPS5751732B2/ja not_active Expired
- 1973-10-02 FR FR7335188A patent/FR2212642B1/fr not_active Expired
- 1973-10-11 GB GB4749573A patent/GB1447524A/en not_active Expired
- 1973-10-17 KR KR7301720A patent/KR780000595B1/ko not_active Expired
- 1973-11-20 PL PL1973166647A patent/PL87007B1/pl unknown
- 1973-11-20 BR BR9074/73A patent/BR7309074D0/pt unknown
- 1973-12-11 RO RO7376955A patent/RO64695A/ro unknown
- 1973-12-19 PH PH15329A patent/PH9927A/en unknown
- 1973-12-21 DE DE2363833A patent/DE2363833C2/de not_active Expired
-
1982
- 1982-03-10 JP JP57037882A patent/JPS57164556A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| RO64695A (ro) | 1980-06-15 |
| US3859718A (en) | 1975-01-14 |
| DE2363833A1 (de) | 1974-07-04 |
| PL87007B1 (https=) | 1976-06-30 |
| GB1447524A (en) | 1976-08-25 |
| JPS57164556A (en) | 1982-10-09 |
| IT991996B (it) | 1975-08-30 |
| PH9927A (en) | 1976-06-14 |
| KR780000595B1 (en) | 1978-11-23 |
| BR7309074D0 (pt) | 1974-10-22 |
| FR2212642B1 (https=) | 1978-11-10 |
| HU167861B (https=) | 1975-12-25 |
| FR2212642A1 (https=) | 1974-07-26 |
| CA1086430A (en) | 1980-09-23 |
| JPS4999477A (https=) | 1974-09-19 |
| DD107812A5 (https=) | 1974-08-12 |
| DE2363833C2 (de) | 1987-01-22 |