JPS574609A - Digital mixing device - Google Patents

Digital mixing device

Info

Publication number
JPS574609A
JPS574609A JP7954680A JP7954680A JPS574609A JP S574609 A JPS574609 A JP S574609A JP 7954680 A JP7954680 A JP 7954680A JP 7954680 A JP7954680 A JP 7954680A JP S574609 A JPS574609 A JP S574609A
Authority
JP
Japan
Prior art keywords
circuit
supplied
channel
optional
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7954680A
Other languages
Japanese (ja)
Other versions
JPS6324329B2 (en
Inventor
Susumu Yamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP7954680A priority Critical patent/JPS574609A/en
Publication of JPS574609A publication Critical patent/JPS574609A/en
Publication of JPS6324329B2 publication Critical patent/JPS6324329B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers

Landscapes

  • Stereophonic System (AREA)
  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To realize a correspondence to any type of specifications just through a change given to an operation part and a control signal generating circuit, by giving mixing to an optional channel signal into an optional combination with an optional level. CONSTITUTION:The digital signal of m channel supplied from an input terminal 6 is converted into a set level through an input interface circuit 7 and supplied to a multiplier 16 after time-division multiplication applied with every channel through a multiplex circuit 8. While the data obtained by an A/D converting means 10 is stored temporarily in a memory circuit 11. The operating information like a fader that is delivered from the circuit 11 and the zero signal supplied from a zero-level data generator 12 are switched through a selector circuit 13. This switching is carried out by the output of a switch signal generating circuit 14 consisting of a parallel input/series output shift register or the like that read the value set by a setting switch group 15. The result of the multiplier 16 is added and accumulated by an accumulator 17.
JP7954680A 1980-06-11 1980-06-11 Digital mixing device Granted JPS574609A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7954680A JPS574609A (en) 1980-06-11 1980-06-11 Digital mixing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7954680A JPS574609A (en) 1980-06-11 1980-06-11 Digital mixing device

Publications (2)

Publication Number Publication Date
JPS574609A true JPS574609A (en) 1982-01-11
JPS6324329B2 JPS6324329B2 (en) 1988-05-20

Family

ID=13692990

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7954680A Granted JPS574609A (en) 1980-06-11 1980-06-11 Digital mixing device

Country Status (1)

Country Link
JP (1) JPS574609A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5970011A (en) * 1982-10-14 1984-04-20 Fujitsu Ltd Digital gain adjusting circuit
JPS6438830U (en) * 1987-08-31 1989-03-08
JPH01221016A (en) * 1987-12-18 1989-09-04 Unisys Corp Wide deviation tracking filter

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5970011A (en) * 1982-10-14 1984-04-20 Fujitsu Ltd Digital gain adjusting circuit
JPS6438830U (en) * 1987-08-31 1989-03-08
JPH01221016A (en) * 1987-12-18 1989-09-04 Unisys Corp Wide deviation tracking filter

Also Published As

Publication number Publication date
JPS6324329B2 (en) 1988-05-20

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