JPS5744337A - Pulse counting circuit - Google Patents

Pulse counting circuit

Info

Publication number
JPS5744337A
JPS5744337A JP55119362A JP11936280A JPS5744337A JP S5744337 A JPS5744337 A JP S5744337A JP 55119362 A JP55119362 A JP 55119362A JP 11936280 A JP11936280 A JP 11936280A JP S5744337 A JPS5744337 A JP S5744337A
Authority
JP
Japan
Prior art keywords
counter
count value
cot2
cot1
counters
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55119362A
Other languages
Japanese (ja)
Other versions
JPS6248932B2 (en
Inventor
Teruo Tobe
Noboru Kuchitsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55119362A priority Critical patent/JPS5744337A/en
Publication of JPS5744337A publication Critical patent/JPS5744337A/en
Publication of JPS6248932B2 publication Critical patent/JPS6248932B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE:To eliminate the need for a buffer memory while eliminating an error in count values by supplying pulses from an oscillator to the 2nd and 3rd counters until the count value of the 1st counter counting input pulses coincides with that of the 2nd counter. CONSTITUTION:A pulse (a), when inputted, is counted by a counter COT1, whose count value (b) is compared with the count value (c) of a counter COT2 by a comparator CON, which when the both do not coincide mutually, drives an oscillator OSC to make the counters COT2 and COT3 count pulses (e) until the counters COT1 and COT2 have the same count value. As an output request signal (f) goes up to a high level, the pulse (e) is ceased and in this state, the count value (g) of the counter COT3 is outputted. During this period, the input pulses (a) are counted by the counter COT1 and if the output request signal (f) goes down to a low level, the oscillator OSC outputs pulses (e) until the counters COT1 and COT2 have the same count value, thereby correcting the count values.
JP55119362A 1980-08-29 1980-08-29 Pulse counting circuit Granted JPS5744337A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55119362A JPS5744337A (en) 1980-08-29 1980-08-29 Pulse counting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55119362A JPS5744337A (en) 1980-08-29 1980-08-29 Pulse counting circuit

Publications (2)

Publication Number Publication Date
JPS5744337A true JPS5744337A (en) 1982-03-12
JPS6248932B2 JPS6248932B2 (en) 1987-10-16

Family

ID=14759611

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55119362A Granted JPS5744337A (en) 1980-08-29 1980-08-29 Pulse counting circuit

Country Status (1)

Country Link
JP (1) JPS5744337A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61111462U (en) * 1984-12-26 1986-07-15
JPH0213480A (en) * 1988-04-16 1990-01-17 Friedrich Wolff Condition training apparatus

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61111462U (en) * 1984-12-26 1986-07-15
JPH0213480A (en) * 1988-04-16 1990-01-17 Friedrich Wolff Condition training apparatus
JPH0412995B2 (en) * 1988-04-16 1992-03-06 Borufu Furiidoritsuhi

Also Published As

Publication number Publication date
JPS6248932B2 (en) 1987-10-16

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