JPS5741029A - Clamping circuit - Google Patents

Clamping circuit

Info

Publication number
JPS5741029A
JPS5741029A JP55116678A JP11667880A JPS5741029A JP S5741029 A JPS5741029 A JP S5741029A JP 55116678 A JP55116678 A JP 55116678A JP 11667880 A JP11667880 A JP 11667880A JP S5741029 A JPS5741029 A JP S5741029A
Authority
JP
Japan
Prior art keywords
circuit
time constant
output
sag
coupling circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55116678A
Other languages
Japanese (ja)
Inventor
Yoshio Tabata
Norio Kanemitsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55116678A priority Critical patent/JPS5741029A/en
Publication of JPS5741029A publication Critical patent/JPS5741029A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/08—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
    • H03K5/082—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding with an adaptive threshold

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To compensate a sag which occurs in an AC coupling circuit, by equalizing a time constant of the AC coupling circuit with a time constant of a sample holding circuit of a clamping circuit. CONSTITUTION:An output from a CCD1 is provided to a differential amplifier 4 and a switching transistor 5 through an AC coupling circuit 2. The transistor 5 is turned on by a sampling pulse synchronizing with a clamp signal from the CCD1, and its output is held by a sample holding circuit 3. An output from the holding circuit 3 is provided to the amplifier 4, and its output becomes a clamped signal. In this case, when a time constant of a resistance 7 and a capacitor 6 is equalized with a time constant of a capacitor 8 and a resistance 9, a sag by the AC coupling circuit 2 and a clamp level become the same curve, and the sag is removed.
JP55116678A 1980-08-25 1980-08-25 Clamping circuit Pending JPS5741029A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55116678A JPS5741029A (en) 1980-08-25 1980-08-25 Clamping circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55116678A JPS5741029A (en) 1980-08-25 1980-08-25 Clamping circuit

Publications (1)

Publication Number Publication Date
JPS5741029A true JPS5741029A (en) 1982-03-06

Family

ID=14693165

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55116678A Pending JPS5741029A (en) 1980-08-25 1980-08-25 Clamping circuit

Country Status (1)

Country Link
JP (1) JPS5741029A (en)

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