JPS54120554A - Sampling and holding circuit - Google Patents

Sampling and holding circuit

Info

Publication number
JPS54120554A
JPS54120554A JP2724978A JP2724978A JPS54120554A JP S54120554 A JPS54120554 A JP S54120554A JP 2724978 A JP2724978 A JP 2724978A JP 2724978 A JP2724978 A JP 2724978A JP S54120554 A JPS54120554 A JP S54120554A
Authority
JP
Japan
Prior art keywords
gate
constitution
amplifier
holding
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2724978A
Other languages
Japanese (ja)
Inventor
Takashi Matsuda
Koji Mizushima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2724978A priority Critical patent/JPS54120554A/en
Publication of JPS54120554A publication Critical patent/JPS54120554A/en
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE: To obtain an inexpensive circuit, and also to improve crosstalk damping characteristics with the circuit constitution simplified by giving a clamp function by opening a holding gate from the time when no input signal arrives.
CONSTITUTION: The sampling and holding circuit consists of pre-amplifier 1 (using an emitter follower at its output stage so that output impedance will be low), holding gate 2', capacitor 4, post amplifier 5, etc. In this constitution, charges of a prior time-slot signal component remaining in capacitor 4 should be discharged in order to secure crosstalk damping among signals to a certain degree. For the purpose, the control signal of gate 2' shown by waveform (ii) is made "H" from the time when input signal (i) does not arrive to make gate 2' conductive, so that residual charges will be discharged the output impedance of amplifier 1. This results in the same effect as the control with a clamping gate provided.
COPYRIGHT: (C)1979,JPO&Japio
JP2724978A 1978-03-10 1978-03-10 Sampling and holding circuit Pending JPS54120554A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2724978A JPS54120554A (en) 1978-03-10 1978-03-10 Sampling and holding circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2724978A JPS54120554A (en) 1978-03-10 1978-03-10 Sampling and holding circuit

Publications (1)

Publication Number Publication Date
JPS54120554A true JPS54120554A (en) 1979-09-19

Family

ID=12215792

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2724978A Pending JPS54120554A (en) 1978-03-10 1978-03-10 Sampling and holding circuit

Country Status (1)

Country Link
JP (1) JPS54120554A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100332510B1 (en) * 1998-01-29 2002-12-26 후지쯔 가부시끼가이샤 Semiconductor device
CN102484478A (en) * 2009-08-14 2012-05-30 熵敏通讯股份有限公司 Method and system for accelerated analog to digital conversion

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52119345A (en) * 1976-03-29 1977-10-06 Stanley Mabo Tape locking device for tape measure

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52119345A (en) * 1976-03-29 1977-10-06 Stanley Mabo Tape locking device for tape measure

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100332510B1 (en) * 1998-01-29 2002-12-26 후지쯔 가부시끼가이샤 Semiconductor device
CN102484478A (en) * 2009-08-14 2012-05-30 熵敏通讯股份有限公司 Method and system for accelerated analog to digital conversion
JP2013502158A (en) * 2009-08-14 2013-01-17 エントロピック・コミュニケーションズ・インコーポレイテッド Method and system for accelerated analog / digital conversion

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