JPS5740673A - Electronic watch - Google Patents

Electronic watch

Info

Publication number
JPS5740673A
JPS5740673A JP11673480A JP11673480A JPS5740673A JP S5740673 A JPS5740673 A JP S5740673A JP 11673480 A JP11673480 A JP 11673480A JP 11673480 A JP11673480 A JP 11673480A JP S5740673 A JPS5740673 A JP S5740673A
Authority
JP
Japan
Prior art keywords
motor
inverted
output
high level
alarm
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11673480A
Other languages
Japanese (ja)
Inventor
Kenichi Ono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP11673480A priority Critical patent/JPS5740673A/en
Publication of JPS5740673A publication Critical patent/JPS5740673A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G04—HOROLOGY
    • G04G—ELECTRONIC TIME-PIECES
    • G04G19/00—Electric power supply circuits specially adapted for use in electronic time-pieces
    • G04G19/08—Arrangements for preventing voltage drop due to overloading the power supply

Abstract

PURPOSE:To prevent the occurrence of trouble in keeping good time, by a method wherein a prohibition of an alarm motion is controlled in accordance with the detecting value of a cell voltage produced at a time when a step motor and an alarm device operate simultaneously. CONSTITUTION:When an alarm device 8 and a step motor 9 work simultaneously, a control signal a applied to a cell voltage detecting circuit 4 is inverted into a high level, and a voltage detector 13 detects a cell voltage. If the voltage becomes below a given value, an output f of the detector 13 is inverted into a high level, and a latch output by NOR gates 10 and 11 is inverted into a high level. Thus, an output of an NOR gate 12, with which an input on one side of the alarm device 8 is produced into an output of a sound composite circuit 14, is inverted into a low level, and a transistor 20 turns OFF to prohibit an alarm motor. Only a driving of the motor 9 is conducted, and if driving of the motor 9 is completed, the prohibition of the motor 8 is released to prevent the occurrence of trouble in keeping good time due to a heavy load.
JP11673480A 1980-08-25 1980-08-25 Electronic watch Pending JPS5740673A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11673480A JPS5740673A (en) 1980-08-25 1980-08-25 Electronic watch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11673480A JPS5740673A (en) 1980-08-25 1980-08-25 Electronic watch

Publications (1)

Publication Number Publication Date
JPS5740673A true JPS5740673A (en) 1982-03-06

Family

ID=14694458

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11673480A Pending JPS5740673A (en) 1980-08-25 1980-08-25 Electronic watch

Country Status (1)

Country Link
JP (1) JPS5740673A (en)

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