JPS5734232A - Information processor - Google Patents

Information processor

Info

Publication number
JPS5734232A
JPS5734232A JP10770580A JP10770580A JPS5734232A JP S5734232 A JPS5734232 A JP S5734232A JP 10770580 A JP10770580 A JP 10770580A JP 10770580 A JP10770580 A JP 10770580A JP S5734232 A JPS5734232 A JP S5734232A
Authority
JP
Japan
Prior art keywords
bus
control signals
signals
outputted
interfaces
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10770580A
Other languages
Japanese (ja)
Inventor
Akira Hitomi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP10770580A priority Critical patent/JPS5734232A/en
Publication of JPS5734232A publication Critical patent/JPS5734232A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/387—Information transfer, e.g. on bus using universal interface adapter for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE:To increase flexibility and improve efficiency in an information processing system by connecting different family components through a bus adaptor. CONSTITUTION:An adaptor for connecting different family components is composed of bus driver/receiver BD/R 11 and 12 which conduct interfaces in each bus, an inverter 15 which is connected between these BD/R 11 and 12 and defines the direction of each bus when receiving a signal BUSACK to occupy the bus and decoders DECs 13 and 14 which receive control signals peculiar to each interface and convert the signals into signals suitable for other interfaces. The control signals MRQ, IORQ, RD, and WR pass the DEC 13 through the BD/R 11 and are outputted as the control signals MRD, MWR, IOR, and IOW fromthe BD/R 12. Reversed control signals pass the DEC14 through the BD/S 12 and are outputted from the BD/R 11.
JP10770580A 1980-08-07 1980-08-07 Information processor Pending JPS5734232A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10770580A JPS5734232A (en) 1980-08-07 1980-08-07 Information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10770580A JPS5734232A (en) 1980-08-07 1980-08-07 Information processor

Publications (1)

Publication Number Publication Date
JPS5734232A true JPS5734232A (en) 1982-02-24

Family

ID=14465848

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10770580A Pending JPS5734232A (en) 1980-08-07 1980-08-07 Information processor

Country Status (1)

Country Link
JP (1) JPS5734232A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60180964A (en) * 1984-02-24 1985-09-14 株式会社トクヤマ Manufacture of aluminum nitride sintered body
JPH04139565A (en) * 1990-10-01 1992-05-13 Sega Enterp Ltd Multiple cpu apparatus
JPH04286047A (en) * 1990-10-12 1992-10-12 Internatl Business Mach Corp <Ibm> Data transfer device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60180964A (en) * 1984-02-24 1985-09-14 株式会社トクヤマ Manufacture of aluminum nitride sintered body
JPH0512299B2 (en) * 1984-02-24 1993-02-17 Tokuyama Soda Kk
JPH04139565A (en) * 1990-10-01 1992-05-13 Sega Enterp Ltd Multiple cpu apparatus
JPH04286047A (en) * 1990-10-12 1992-10-12 Internatl Business Mach Corp <Ibm> Data transfer device

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