JPS5727361A - Vector data processor - Google Patents

Vector data processor

Info

Publication number
JPS5727361A
JPS5727361A JP10152980A JP10152980A JPS5727361A JP S5727361 A JPS5727361 A JP S5727361A JP 10152980 A JP10152980 A JP 10152980A JP 10152980 A JP10152980 A JP 10152980A JP S5727361 A JPS5727361 A JP S5727361A
Authority
JP
Japan
Prior art keywords
access
register
address
access request
data processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10152980A
Other languages
Japanese (ja)
Other versions
JPS6120905B2 (en
Inventor
Hiroshi Tamura
Keiichiro Uchida
Shigeaki Okuya
Tetsuo Okamoto
Isao Azuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10152980A priority Critical patent/JPS5727361A/en
Publication of JPS5727361A publication Critical patent/JPS5727361A/en
Publication of JPS6120905B2 publication Critical patent/JPS6120905B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)

Abstract

PURPOSE:To attain access to a vector register efficiently by providing a means of prescribing the timing where each access requesting origin is capable of accessing each element storage area. CONSTITUTION:When an access access requesting origin ER2 makes an access request, an access request selecting circuit 58 fetches the inbank address of an address register 35 with a #1 time slot, and sends it in a register 50. When an access requesting origin ER3 makes an access request, the access request selecting circuit 58 fetches the inbank address of an address register 36 with a #2 time slot, and sets it in the register 50.
JP10152980A 1980-07-24 1980-07-24 Vector data processor Granted JPS5727361A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10152980A JPS5727361A (en) 1980-07-24 1980-07-24 Vector data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10152980A JPS5727361A (en) 1980-07-24 1980-07-24 Vector data processor

Publications (2)

Publication Number Publication Date
JPS5727361A true JPS5727361A (en) 1982-02-13
JPS6120905B2 JPS6120905B2 (en) 1986-05-24

Family

ID=14302985

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10152980A Granted JPS5727361A (en) 1980-07-24 1980-07-24 Vector data processor

Country Status (1)

Country Link
JP (1) JPS5727361A (en)

Also Published As

Publication number Publication date
JPS6120905B2 (en) 1986-05-24

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