JPS57211269A - Semiconductor element - Google Patents

Semiconductor element

Info

Publication number
JPS57211269A
JPS57211269A JP9890181A JP9890181A JPS57211269A JP S57211269 A JPS57211269 A JP S57211269A JP 9890181 A JP9890181 A JP 9890181A JP 9890181 A JP9890181 A JP 9890181A JP S57211269 A JPS57211269 A JP S57211269A
Authority
JP
Japan
Prior art keywords
evaporated
tin
coated
difficult
chemical reaction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9890181A
Other languages
Japanese (ja)
Other versions
JPH0376031B2 (en
Inventor
Mitsutoshi Hibino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP9890181A priority Critical patent/JPS57211269A/en
Publication of JPS57211269A publication Critical patent/JPS57211269A/en
Publication of JPH0376031B2 publication Critical patent/JPH0376031B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05073—Single internal layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01022—Titanium [Ti]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01074—Tungsten [W]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049—Nitrides composed of metals from groups of the periodic table
    • H01L2924/0494—4th Group
    • H01L2924/04941—TiN

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To prevent a chemical reaction between Si and Au, and to obviate the defective adhesion of wire bonding by positioning the compound or mixture layer of TiN and a metallic nitride between Si and an Au electrode. CONSTITUTION:A P base 2 is formed to an N type Si substrate 1 and an N emitter 3 is shaped into the P base, the surface is coated with SiO2 4, and openings are formed, Pt is evaporated, a silicide is shaped and an ohmic resistance region 5 is provided through selective etching. A resist mask 11 with windows 8 is coated, Ti-W is sputtered in an Ar+N2 atmosphere, and reacted with N2, the compound layers 9 of Ti-N and W-N groups are formed, and Au 10 is evaporated in Ar. Lastly, unnecessary metals are removed together with the resist 11. Ti-N is difficult to be dissolved in Au, the oxide of Ti is difficult to be formed on the surface of Au, and the defective adhesion of wire bonding is avoided. The chemical reaction between Au and Si can also be prevented by the presence of TiN, MoN, WN, etc.
JP9890181A 1981-06-22 1981-06-22 Semiconductor element Granted JPS57211269A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9890181A JPS57211269A (en) 1981-06-22 1981-06-22 Semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9890181A JPS57211269A (en) 1981-06-22 1981-06-22 Semiconductor element

Publications (2)

Publication Number Publication Date
JPS57211269A true JPS57211269A (en) 1982-12-25
JPH0376031B2 JPH0376031B2 (en) 1991-12-04

Family

ID=14232027

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9890181A Granted JPS57211269A (en) 1981-06-22 1981-06-22 Semiconductor element

Country Status (1)

Country Link
JP (1) JPS57211269A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4566026A (en) * 1984-04-25 1986-01-21 Honeywell Inc. Integrated circuit bimetal layer
US4574298A (en) * 1982-12-27 1986-03-04 Tokyo Shibaura Denki Kabushiki Kaisha III-V Compound semiconductor device
JPS6449243A (en) * 1987-08-20 1989-02-23 Nec Corp Semiconductor integrated circuit device
US4816424A (en) * 1983-03-25 1989-03-28 Fujitsu Limited Method of producing semiconductor device having multilayer conductive lines
US4903110A (en) * 1987-06-15 1990-02-20 Nec Corporation Single plate capacitor having an electrode structure of high adhesion
US5227335A (en) * 1986-11-10 1993-07-13 At&T Bell Laboratories Tungsten metallization

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4574298A (en) * 1982-12-27 1986-03-04 Tokyo Shibaura Denki Kabushiki Kaisha III-V Compound semiconductor device
US4816424A (en) * 1983-03-25 1989-03-28 Fujitsu Limited Method of producing semiconductor device having multilayer conductive lines
US4566026A (en) * 1984-04-25 1986-01-21 Honeywell Inc. Integrated circuit bimetal layer
US5227335A (en) * 1986-11-10 1993-07-13 At&T Bell Laboratories Tungsten metallization
US4903110A (en) * 1987-06-15 1990-02-20 Nec Corporation Single plate capacitor having an electrode structure of high adhesion
JPS6449243A (en) * 1987-08-20 1989-02-23 Nec Corp Semiconductor integrated circuit device

Also Published As

Publication number Publication date
JPH0376031B2 (en) 1991-12-04

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