JPS5720998A - Memory control system - Google Patents

Memory control system

Info

Publication number
JPS5720998A
JPS5720998A JP9508880A JP9508880A JPS5720998A JP S5720998 A JPS5720998 A JP S5720998A JP 9508880 A JP9508880 A JP 9508880A JP 9508880 A JP9508880 A JP 9508880A JP S5720998 A JPS5720998 A JP S5720998A
Authority
JP
Japan
Prior art keywords
memory
transfer
external device
control system
during
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9508880A
Other languages
Japanese (ja)
Inventor
Kazuo Furukawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP9508880A priority Critical patent/JPS5720998A/en
Publication of JPS5720998A publication Critical patent/JPS5720998A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/073Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE:To increase a transfer speed by utilizing a circulating memory. CONSTITUTION:Once access from an external device is started, the contents of the additional memory 4i of a magnetic bubble memory unit 2i spefified via a selection signal line 11 are all transferred to an additional memory 12. During this transfer, defective position data which corresponds to data stored in the memory 12 previously is read and sent out to the external device via a converting circuit 7. During data transfer in the next cycle, the converting operation is performed similarly.
JP9508880A 1980-07-14 1980-07-14 Memory control system Pending JPS5720998A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9508880A JPS5720998A (en) 1980-07-14 1980-07-14 Memory control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9508880A JPS5720998A (en) 1980-07-14 1980-07-14 Memory control system

Publications (1)

Publication Number Publication Date
JPS5720998A true JPS5720998A (en) 1982-02-03

Family

ID=14128166

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9508880A Pending JPS5720998A (en) 1980-07-14 1980-07-14 Memory control system

Country Status (1)

Country Link
JP (1) JPS5720998A (en)

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