JPS57208882A - Speed controlling circuit for motor - Google Patents
Speed controlling circuit for motorInfo
- Publication number
- JPS57208882A JPS57208882A JP56093927A JP9392781A JPS57208882A JP S57208882 A JPS57208882 A JP S57208882A JP 56093927 A JP56093927 A JP 56093927A JP 9392781 A JP9392781 A JP 9392781A JP S57208882 A JPS57208882 A JP S57208882A
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- circuit
- division
- division circuit
- controlling
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P23/00—Arrangements or methods for the control of AC motors characterised by a control method other than vector control
- H02P23/18—Controlling the angular speed together with angular position or phase
- H02P23/186—Controlling the angular speed together with angular position or phase of one shaft by controlling the prime mover
Abstract
PURPOSE:To simplify a circuit by a method wherein a common frequency-division circuit is provided for two frequency-division circuits shaping speed controlling reference time signals. CONSTITUTION:A signal output by a crystal oscillator circuit 4 is divided in a frequency-division circuit 5 to form a reference frequence pulse fr. The speed- controlling frequency-division circuit consists of a frequency-division circuit 1 receiving the reference frequency pulse fr, and first and second frequency-division circuits 2a and 2b both receiving the output signal from the common frequency-division circuit 1. For example, resetting pulses (a) and (b) representing the behavior of the frequency-division circuits 2a and 2b are inputted to a speed comparator circuit 6 wherein a speed controlling signal FV and a lock detecting signal LD are shaped corresponding to the phase difference between the two resetting pulses (a) and (b). The phase controlling circuit is composed of a frequency-division circuit 3 and a digital phase detecting circuit 7 receiving both the output of the frequency-division circuit 3 and a rotation detecting pulse FGP.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56093927A JPS57208882A (en) | 1981-06-19 | 1981-06-19 | Speed controlling circuit for motor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56093927A JPS57208882A (en) | 1981-06-19 | 1981-06-19 | Speed controlling circuit for motor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57208882A true JPS57208882A (en) | 1982-12-22 |
Family
ID=14096063
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56093927A Pending JPS57208882A (en) | 1981-06-19 | 1981-06-19 | Speed controlling circuit for motor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57208882A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61198467A (en) * | 1985-02-28 | 1986-09-02 | Canon Inc | Magnetic disc device |
-
1981
- 1981-06-19 JP JP56093927A patent/JPS57208882A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61198467A (en) * | 1985-02-28 | 1986-09-02 | Canon Inc | Magnetic disc device |
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