JPS57195387A - Data lien precharging system of memory integrated circuit - Google Patents

Data lien precharging system of memory integrated circuit

Info

Publication number
JPS57195387A
JPS57195387A JP56079199A JP7919981A JPS57195387A JP S57195387 A JPS57195387 A JP S57195387A JP 56079199 A JP56079199 A JP 56079199A JP 7919981 A JP7919981 A JP 7919981A JP S57195387 A JPS57195387 A JP S57195387A
Authority
JP
Japan
Prior art keywords
precharging
data line
potential
starting
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56079199A
Other languages
Japanese (ja)
Inventor
Yutaka Yoneda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56079199A priority Critical patent/JPS57195387A/en
Publication of JPS57195387A publication Critical patent/JPS57195387A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines

Abstract

PURPOSE:To minimize a delay time until the starting of the precharging of a data line and to realize a high-speed memory by detecting the potential of a word line and starting the precharging of the data line after the detected potential drops sufficiently. CONSTITUTION:When charge on a word line 10 is to be discharged where the charge remains most lastly, e.g. on the side of a word driver 11, the potential of the word line is detected at its farther end A. The obtained signal is used as the gate signal of a transistor (TR) Qs. While the word line 10 is at a high potential, the TR Qs turns on and no data line precharging signal is generated. When the data line potential drops sufficiently and becomes lower than a threshold level voltage, the TR Qs turns off and the data line precharging signal goes up to a high potential, thereby starting the precharging of the data line.
JP56079199A 1981-05-27 1981-05-27 Data lien precharging system of memory integrated circuit Pending JPS57195387A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56079199A JPS57195387A (en) 1981-05-27 1981-05-27 Data lien precharging system of memory integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56079199A JPS57195387A (en) 1981-05-27 1981-05-27 Data lien precharging system of memory integrated circuit

Publications (1)

Publication Number Publication Date
JPS57195387A true JPS57195387A (en) 1982-12-01

Family

ID=13683289

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56079199A Pending JPS57195387A (en) 1981-05-27 1981-05-27 Data lien precharging system of memory integrated circuit

Country Status (1)

Country Link
JP (1) JPS57195387A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60247896A (en) * 1984-05-23 1985-12-07 Hitachi Ltd Semiconductor device
US4638462A (en) * 1985-01-31 1987-01-20 International Business Machines Corporation Self-timed precharge circuit
JPS62197990A (en) * 1986-02-25 1987-09-01 Mitsubishi Electric Corp Semiconductor memory circuit
US4722074A (en) * 1984-10-31 1988-01-26 Mitsubishi Denki Kabushiki Kaisha Semiconductor storage unit with I/O bus precharging and equalization
JPH0194592A (en) * 1987-10-06 1989-04-13 Fujitsu Ltd Semiconductor memory

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60247896A (en) * 1984-05-23 1985-12-07 Hitachi Ltd Semiconductor device
US4722074A (en) * 1984-10-31 1988-01-26 Mitsubishi Denki Kabushiki Kaisha Semiconductor storage unit with I/O bus precharging and equalization
US4638462A (en) * 1985-01-31 1987-01-20 International Business Machines Corporation Self-timed precharge circuit
JPS62197990A (en) * 1986-02-25 1987-09-01 Mitsubishi Electric Corp Semiconductor memory circuit
JPH0568798B2 (en) * 1986-02-25 1993-09-29 Mitsubishi Electric Corp
JPH0194592A (en) * 1987-10-06 1989-04-13 Fujitsu Ltd Semiconductor memory

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