JPS57188141A - Automatic phase controlling circuit - Google Patents

Automatic phase controlling circuit

Info

Publication number
JPS57188141A
JPS57188141A JP56073053A JP7305381A JPS57188141A JP S57188141 A JPS57188141 A JP S57188141A JP 56073053 A JP56073053 A JP 56073053A JP 7305381 A JP7305381 A JP 7305381A JP S57188141 A JPS57188141 A JP S57188141A
Authority
JP
Japan
Prior art keywords
input signal
oscillator
filter
frequency
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56073053A
Other languages
Japanese (ja)
Inventor
Tetsuo Kuchiki
Mitsuo Isobe
Namio Yamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP56073053A priority Critical patent/JPS57188141A/en
Publication of JPS57188141A publication Critical patent/JPS57188141A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To prevent out-of-synchronism due to the fluctuation of an input signal frequency, by applying an input signal ro an FM detector and supplying the detected output to an oscillator in a phase synchronizing loop via a filter. CONSTITUTION:An input signal applied to a terminal 1 and an output signal of an oscillator 3 are applied to a phase comparator 2, the compared output is applied to the oscillator 3 via the 1st filter 4 to constitute a phase synchronizing loop. An input signal is applied to an FM detector 6 and the detected output is applied to the oscillator 3 via the 2nd filter 7. If the frequency of the input signal is fluctuated outside the synchronizing range of the phase synchronizing loop, the input signal is FM-detected and the detected output is applied to an oscillator via the filter, allowing to change the oscillated frequency of the oscillator to the same direction as that of fluctuation of the frequency of the input signal for synchronization.
JP56073053A 1981-05-14 1981-05-14 Automatic phase controlling circuit Pending JPS57188141A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56073053A JPS57188141A (en) 1981-05-14 1981-05-14 Automatic phase controlling circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56073053A JPS57188141A (en) 1981-05-14 1981-05-14 Automatic phase controlling circuit

Publications (1)

Publication Number Publication Date
JPS57188141A true JPS57188141A (en) 1982-11-19

Family

ID=13507231

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56073053A Pending JPS57188141A (en) 1981-05-14 1981-05-14 Automatic phase controlling circuit

Country Status (1)

Country Link
JP (1) JPS57188141A (en)

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