JPS57184369A - Picture converting device - Google Patents
Picture converting deviceInfo
- Publication number
- JPS57184369A JPS57184369A JP56068904A JP6890481A JPS57184369A JP S57184369 A JPS57184369 A JP S57184369A JP 56068904 A JP56068904 A JP 56068904A JP 6890481 A JP6890481 A JP 6890481A JP S57184369 A JPS57184369 A JP S57184369A
- Authority
- JP
- Japan
- Prior art keywords
- picture
- binary
- generator
- rom3
- address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/46—Colour picture communication systems
- H04N1/52—Circuits or arrangements for halftone screening
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Image Processing (AREA)
- Facsimile Image Signal Circuits (AREA)
Abstract
PURPOSE:To eliminate the noise and to improve the picture quality, by performing a filtering operation to eliminate the high band component of a binary picture, converting the binary picture into a picture having the gradation corresponding to the output picture element and delivering the converted picture after binary coding it by the dithering. CONSTITUTION:The input binary picture signals of a memory device 10 are successively shifted to a shift register 2 synchronizing with the clock given from a clock generator 1. It is uspposed that an original picture comprises (NXM) units of picture elements in all, and the total 8 bits of the register 2 are connected to the address input of an ROM3. For the ROM3, the weighting mean value of each bit of an address signal is written into an address that is designated by the address input. Thus the said mean value is delivered from the ROM3 with application of the address input, and this output is fed to a comparator 4. The output of the comparator 4 is turned into a binary signal that is set at ''1'' and ''0'' when the increment of the mean value given from a generator 5 is large and small respectively. The generator 5 functions as an ROM forming a dither pattern generator.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56068904A JPS57184369A (en) | 1981-05-09 | 1981-05-09 | Picture converting device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56068904A JPS57184369A (en) | 1981-05-09 | 1981-05-09 | Picture converting device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57184369A true JPS57184369A (en) | 1982-11-13 |
Family
ID=13387098
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56068904A Pending JPS57184369A (en) | 1981-05-09 | 1981-05-09 | Picture converting device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57184369A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05260306A (en) * | 1991-09-13 | 1993-10-08 | Canon Inc | Image processor |
-
1981
- 1981-05-09 JP JP56068904A patent/JPS57184369A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05260306A (en) * | 1991-09-13 | 1993-10-08 | Canon Inc | Image processor |
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