JPS5718220B2 - - Google Patents

Info

Publication number
JPS5718220B2
JPS5718220B2 JP12414877A JP12414877A JPS5718220B2 JP S5718220 B2 JPS5718220 B2 JP S5718220B2 JP 12414877 A JP12414877 A JP 12414877A JP 12414877 A JP12414877 A JP 12414877A JP S5718220 B2 JPS5718220 B2 JP S5718220B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP12414877A
Other languages
Japanese (ja)
Other versions
JPS5355931A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS5355931A publication Critical patent/JPS5355931A/ja
Publication of JPS5718220B2 publication Critical patent/JPS5718220B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Bus Control (AREA)
  • Memory System (AREA)
  • Time-Division Multiplex Systems (AREA)
JP12414877A 1976-10-29 1977-10-18 Priority selector used for data processor system Granted JPS5355931A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/736,798 US4130864A (en) 1976-10-29 1976-10-29 Priority selection circuit for multiported central functional unit with automatic priority reduction on excessive port request

Publications (2)

Publication Number Publication Date
JPS5355931A JPS5355931A (en) 1978-05-20
JPS5718220B2 true JPS5718220B2 (US06811534-20041102-M00003.png) 1982-04-15

Family

ID=24961342

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12414877A Granted JPS5355931A (en) 1976-10-29 1977-10-18 Priority selector used for data processor system

Country Status (6)

Country Link
US (1) US4130864A (US06811534-20041102-M00003.png)
JP (1) JPS5355931A (US06811534-20041102-M00003.png)
BE (1) BE860282A (US06811534-20041102-M00003.png)
FR (1) FR2369628A1 (US06811534-20041102-M00003.png)
GB (1) GB1593885A (US06811534-20041102-M00003.png)
IT (1) IT1091937B (US06811534-20041102-M00003.png)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20200124533A (ko) * 2019-04-24 2020-11-03 (주)스티커스 코퍼레이션 도담쌀 성분을 포함하는 기능성 개껌 및 이에 의해 제조된 기능성 개껌

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2846925C2 (de) * 1978-10-27 1982-09-09 Siemens AG, 1000 Berlin und 8000 München Mikrocomputer-Netzwerk mit mehreren an mindestens einen Systembus angekoppelten Mikrocomputer-Moduln
JPS5846098B2 (ja) * 1978-10-30 1983-10-14 株式会社日立製作所 ル−プバスネットワ−クシステムにおけるバス優先制御方式
JPS5621219A (en) * 1979-07-30 1981-02-27 Nec Corp Request receiving and selecting unit
US4313161A (en) * 1979-11-13 1982-01-26 International Business Machines Corporation Shared storage for multiple processor systems
US4390943A (en) * 1979-12-26 1983-06-28 Honeywell Information Systems Inc. Interface apparatus for data transfer through an input/output multiplexer from plural CPU subsystems to peripheral subsystems
JPS56121126A (en) * 1980-02-26 1981-09-22 Toshiba Corp Priority level assigning circuit
FR2513469B1 (fr) * 1981-09-24 1987-12-11 Thomson Csf Mat Tel Dispositif de selection rapide et automatique d'un signal parmi n
US4675812A (en) * 1983-02-14 1987-06-23 International Business Machines Corp. Priority circuit for channel subsystem having components with diverse and changing requirement for system resources
US4901230A (en) * 1983-04-25 1990-02-13 Cray Research, Inc. Computer vector multiprocessing control with multiple access memory and priority conflict resolution method
EP0124806B1 (de) * 1983-05-06 1987-09-30 BBC Brown Boveri AG Vergabeschaltung für Parallelbusse von Datenverarbeitungsanlagen
US4608663A (en) * 1983-08-31 1986-08-26 Wolsten's Computer Devices, Inc. Computer network for using a common peripheral device
US4787033A (en) * 1983-09-22 1988-11-22 Digital Equipment Corporation Arbitration mechanism for assigning control of a communications path in a digital computer system
US4835672A (en) * 1984-04-02 1989-05-30 Unisys Corporation Access lock apparatus for use with a high performance storage unit of a digital data processing system
US4630197A (en) * 1984-04-06 1986-12-16 Gte Communication Systems Corporation Anti-mutilation circuit for protecting dynamic memory
CA1248239A (en) * 1984-10-30 1989-01-03 Kenneth R. Jaskowiak Equal access bus arbiter
US4964034A (en) * 1984-10-30 1990-10-16 Raytheon Company Synchronized processing system with bus arbiter which samples and stores bus request signals and synchronizes bus grant signals according to clock signals
US4745545A (en) * 1985-06-28 1988-05-17 Cray Research, Inc. Memory reference control in a multiprocessor
US4858173A (en) * 1986-01-29 1989-08-15 Digital Equipment Corporation Apparatus and method for responding to an aborted signal exchange between subsystems in a data processing system
US4821177A (en) * 1986-09-02 1989-04-11 Honeywell Bull Inc. Apparatus for controlling system accesses having multiple command level conditional rotational multiple port servicing priority hierarchy
GB2196762B (en) * 1986-10-27 1990-12-19 Burr Brown Ltd Interleaved access to global memory by high priority source
US4812968A (en) * 1986-11-12 1989-03-14 International Business Machines Corp. Method for controlling processor access to input/output devices
JPS63132369A (ja) * 1986-11-21 1988-06-04 Oki Electric Ind Co Ltd メモリ情報転送方式
US5283903A (en) * 1986-12-25 1994-02-01 Nec Corporation Priority selector
US5214769A (en) * 1987-12-24 1993-05-25 Fujitsu Limited Multiprocessor control system
DE68924876T2 (de) * 1988-07-12 1996-04-25 Sony Corp Integrierte Halbleiterschaltungen.
US5179667A (en) * 1988-09-14 1993-01-12 Silicon Graphics, Inc. Synchronized DRAM control apparatus using two different clock rates
US5193193A (en) * 1988-09-14 1993-03-09 Silicon Graphics, Inc. Bus control system for arbitrating requests with predetermined on/off time limitations
DE68929288T2 (de) * 1988-12-19 2001-11-15 Nec Corp Datenübertragungsvorrichtung
US5303351A (en) * 1988-12-30 1994-04-12 International Business Machines Corporation Error recovery in a multiple 170 channel computer system
US5142638A (en) * 1989-02-07 1992-08-25 Cray Research, Inc. Apparatus for sharing memory in a multiprocessor system
US5095460A (en) * 1989-04-25 1992-03-10 Digital Equipment Corporation Rotating priority encoder operating by selectively masking input signals to a fixed priority encoder
US5206952A (en) * 1990-09-12 1993-04-27 Cray Research, Inc. Fault tolerant networking architecture
WO1992015060A1 (en) * 1991-02-19 1992-09-03 International Business Machines Corporation Channel selection arbitration
JP3199966B2 (ja) * 1994-11-21 2001-08-20 キヤノン株式会社 情報処理装置及びそのプリンタ選択方法
US5754865A (en) * 1995-12-18 1998-05-19 International Business Machines Corporation Logical address bus architecture for multiple processor systems
US5815023A (en) * 1997-03-20 1998-09-29 Sun Microsystems, Inc. Unbalanced multiplexer and arbiter combination
US6925520B2 (en) * 2001-05-31 2005-08-02 Sun Microsystems, Inc. Self-optimizing crossbar switch
CN1318941C (zh) * 2003-08-05 2007-05-30 华为技术有限公司 一种端口轮询选择方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS505009A (US06811534-20041102-M00003.png) * 1973-03-29 1975-01-20
JPS5014246A (US06811534-20041102-M00003.png) * 1973-06-06 1975-02-14

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3333252A (en) * 1965-01-18 1967-07-25 Burroughs Corp Time-dependent priority system
NL164143C (nl) * 1965-09-10 Ibm Gegevensverwerkend systeem met variabele prioriteiten.
FR1541240A (fr) * 1966-11-10 Ibm Accès à chevauchement et à intercalation pour mémoires à plusieurs vitesses
US3573856A (en) * 1969-06-24 1971-04-06 Texas Instruments Inc Distributed priority of access to a computer unit
US3638198A (en) * 1969-07-09 1972-01-25 Burroughs Corp Priority resolution network for input/output exchange
US3753014A (en) * 1971-03-15 1973-08-14 Burroughs Corp Fast inhibit gate with applications
US3798591A (en) * 1971-09-28 1974-03-19 Gen Electric Co Ltd Access circuit for a time-shared data processing equipment
IT971304B (it) * 1972-11-29 1974-04-30 Honeywell Inf Systems Sistema di accesso a priorita variabile dinamicamente
US3866181A (en) * 1972-12-26 1975-02-11 Honeywell Inf Systems Interrupt sequencing control apparatus
GB1442078A (en) * 1973-07-21 1976-07-07 Ibm Data handling system
IT998437B (it) * 1973-08-22 1976-01-20 Honeywell Inf Systems Sistema di accesso a scansione ciclica variabile delle richieste di interruzione
US3921145A (en) * 1973-10-12 1975-11-18 Burroughs Corp Multirequest grouping computer interface
IT1002275B (it) * 1973-12-27 1976-05-20 Honeywell Inf Systems Sistema di elaborazione dati a piu canali di ingresso uscita a risorse orientate per livelli di servizio distinti e interrompi bili
US3967246A (en) * 1974-06-05 1976-06-29 Bell Telephone Laboratories, Incorporated Digital computer arrangement for communicating data via data buses
US4009470A (en) * 1975-02-18 1977-02-22 Sperry Rand Corporation Pre-emptive, rotational priority system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS505009A (US06811534-20041102-M00003.png) * 1973-03-29 1975-01-20
JPS5014246A (US06811534-20041102-M00003.png) * 1973-06-06 1975-02-14

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20200124533A (ko) * 2019-04-24 2020-11-03 (주)스티커스 코퍼레이션 도담쌀 성분을 포함하는 기능성 개껌 및 이에 의해 제조된 기능성 개껌

Also Published As

Publication number Publication date
US4130864A (en) 1978-12-19
IT1091937B (it) 1985-07-06
JPS5355931A (en) 1978-05-20
BE860282A (fr) 1978-04-28
GB1593885A (en) 1981-07-22
FR2369628B1 (US06811534-20041102-M00003.png) 1984-08-24
FR2369628A1 (fr) 1978-05-26

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