JPS57176469A - Asynchronous interruption control system - Google Patents

Asynchronous interruption control system

Info

Publication number
JPS57176469A
JPS57176469A JP6171281A JP6171281A JPS57176469A JP S57176469 A JPS57176469 A JP S57176469A JP 6171281 A JP6171281 A JP 6171281A JP 6171281 A JP6171281 A JP 6171281A JP S57176469 A JPS57176469 A JP S57176469A
Authority
JP
Japan
Prior art keywords
processor
signal
data
asynchronous
control system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6171281A
Other languages
Japanese (ja)
Other versions
JPS6239791B2 (en
Inventor
Toru Hayakawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Facom Corp
Original Assignee
Fuji Facom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Facom Corp filed Critical Fuji Facom Corp
Priority to JP6171281A priority Critical patent/JPS57176469A/en
Publication of JPS57176469A publication Critical patent/JPS57176469A/en
Publication of JPS6239791B2 publication Critical patent/JPS6239791B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To improve the processing time and the data transmission efficiency, by providing the 1st and 2nd processors and picking up the sense information from the 2nd processor and operating the 1st processor according to the sense information, when the 1st processor receive an asynchronous interruption signal from the 2nd processor. CONSTITUTION:A front processor 14 transmits an asynchronous interrupting signal AT and a unit check signal UC, a start I/O instruction S is given from a host processor 1 receiving this interruption, a data D is transmitted front processor 14, a channel end signal CE and a device end signal DE are transmitted at the end of data transmission and the transfer of data is finished. Thus, the data transfer can be made by only transmitting the start I/O instruction S once.
JP6171281A 1981-04-23 1981-04-23 Asynchronous interruption control system Granted JPS57176469A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6171281A JPS57176469A (en) 1981-04-23 1981-04-23 Asynchronous interruption control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6171281A JPS57176469A (en) 1981-04-23 1981-04-23 Asynchronous interruption control system

Publications (2)

Publication Number Publication Date
JPS57176469A true JPS57176469A (en) 1982-10-29
JPS6239791B2 JPS6239791B2 (en) 1987-08-25

Family

ID=13179108

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6171281A Granted JPS57176469A (en) 1981-04-23 1981-04-23 Asynchronous interruption control system

Country Status (1)

Country Link
JP (1) JPS57176469A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5463644A (en) * 1977-10-31 1979-05-22 Toshiba Corp Multiprocessing system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5463644A (en) * 1977-10-31 1979-05-22 Toshiba Corp Multiprocessing system

Also Published As

Publication number Publication date
JPS6239791B2 (en) 1987-08-25

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