JPS57173284A - Automatic gain controller - Google Patents

Automatic gain controller

Info

Publication number
JPS57173284A
JPS57173284A JP5720781A JP5720781A JPS57173284A JP S57173284 A JPS57173284 A JP S57173284A JP 5720781 A JP5720781 A JP 5720781A JP 5720781 A JP5720781 A JP 5720781A JP S57173284 A JPS57173284 A JP S57173284A
Authority
JP
Japan
Prior art keywords
signal
circuit
gain control
character
automatic gain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5720781A
Other languages
Japanese (ja)
Inventor
Minoru Sakai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5720781A priority Critical patent/JPS57173284A/en
Publication of JPS57173284A publication Critical patent/JPS57173284A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/025—Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
    • H04N7/035—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Systems (AREA)

Abstract

PURPOSE:To obtain an accurate character multiplex image by performing gain control in automatically detecting the shift of the superposition position and the number of times of superposition H of a character multiplex signal on a transmission side. CONSTITUTION:The detection output of a video detecting circuit 3 is applied to a character multiplex signal separating and shaping circuit 7 and a synchronizing signal and bit clock reproducing circuit 9. A video signal is passed through an amplifying circuit 13 to hold the level of the character multiplex signal constant by an automatic gain control signal 21 obtained by an automatic gain control circuit 26. The character multiplex signal held at the constant level is converted by a comparator 14 into a binary signal, and then sampled by a multiplex signal sampling circuit 15 by using a sampling signal generated by said reproducing circuit 9. Then, its output is passed through an error correcting circuit 8 to output a character signal. Automatic gain control circuit 26 is brought under gain control during the detection period of a clock-line signal, so the level of a multiplex position is held constant all the time, thus obtaining the accurate character signal.
JP5720781A 1981-04-17 1981-04-17 Automatic gain controller Pending JPS57173284A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5720781A JPS57173284A (en) 1981-04-17 1981-04-17 Automatic gain controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5720781A JPS57173284A (en) 1981-04-17 1981-04-17 Automatic gain controller

Publications (1)

Publication Number Publication Date
JPS57173284A true JPS57173284A (en) 1982-10-25

Family

ID=13049057

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5720781A Pending JPS57173284A (en) 1981-04-17 1981-04-17 Automatic gain controller

Country Status (1)

Country Link
JP (1) JPS57173284A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4751577A (en) * 1986-07-19 1988-06-14 Sony Corporation Gain control circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4751577A (en) * 1986-07-19 1988-06-14 Sony Corporation Gain control circuit

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