JPS57107688A - Sampling pulse correcting system - Google Patents
Sampling pulse correcting systemInfo
- Publication number
- JPS57107688A JPS57107688A JP18421580A JP18421580A JPS57107688A JP S57107688 A JPS57107688 A JP S57107688A JP 18421580 A JP18421580 A JP 18421580A JP 18421580 A JP18421580 A JP 18421580A JP S57107688 A JPS57107688 A JP S57107688A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- data
- delay
- slice
- slice level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/08—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Television Systems (AREA)
Abstract
PURPOSE:To achieve an accurate clock pulse for data picking up by adjusting the phase shift of a sampling clock pulse and providing a means automatically adjusting slice level of data. CONSTITUTION:A signal from a video detecting stage is applied to a sampling circuit from a terminal 53 via a slice circuit 10G. The clock pulse from a terminal 50 is given to a delay means 10A, and amount of delay is controlled at a delay amount control means 10B operating a clock line signal input from a terminal 51 as a gate pulse to obtain a data sampling clock signal at the terminal 51. On the other hand, this clock signal is given to a slice circuit 10G through a D/A converter 10F from a slice level control means 10C to adjust the slice level. Thus, the pickup of data can be made accurately.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18421580A JPS57107688A (en) | 1980-12-25 | 1980-12-25 | Sampling pulse correcting system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18421580A JPS57107688A (en) | 1980-12-25 | 1980-12-25 | Sampling pulse correcting system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57107688A true JPS57107688A (en) | 1982-07-05 |
| JPS6258598B2 JPS6258598B2 (en) | 1987-12-07 |
Family
ID=16149375
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18421580A Granted JPS57107688A (en) | 1980-12-25 | 1980-12-25 | Sampling pulse correcting system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57107688A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58172081A (en) * | 1982-04-02 | 1983-10-08 | Hitachi Ltd | Generating circuit of synchronizing clock |
| JPS58204686A (en) * | 1982-05-21 | 1983-11-29 | Sharp Corp | Sampling clock generating circuit in character multiplex broadcast receiver |
| JPS59143481A (en) * | 1983-02-04 | 1984-08-17 | Matsushita Electric Ind Co Ltd | Demodulating equipment of data clock |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020166720A1 (en) | 2019-02-14 | 2020-08-20 | 株式会社タダノ | Outrigger control device |
-
1980
- 1980-12-25 JP JP18421580A patent/JPS57107688A/en active Granted
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58172081A (en) * | 1982-04-02 | 1983-10-08 | Hitachi Ltd | Generating circuit of synchronizing clock |
| JPH0421393B2 (en) * | 1982-04-02 | 1992-04-09 | Hitachi Seisakusho Kk | |
| JPS58204686A (en) * | 1982-05-21 | 1983-11-29 | Sharp Corp | Sampling clock generating circuit in character multiplex broadcast receiver |
| JPH0312511B2 (en) * | 1982-05-21 | 1991-02-20 | Sharp Kk | |
| JPS59143481A (en) * | 1983-02-04 | 1984-08-17 | Matsushita Electric Ind Co Ltd | Demodulating equipment of data clock |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6258598B2 (en) | 1987-12-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0361452A3 (en) | Digital automatic gain control apparatus and method | |
| JPS57107688A (en) | Sampling pulse correcting system | |
| JPS5686582A (en) | Quantizing system at reception side for video information transmitter | |
| EP0266148A3 (en) | A tone control system for sampled data signals | |
| JPS53136424A (en) | Correlative processing system for picture signal | |
| JPS52148787A (en) | Phase delay detecting compensation method for control system | |
| JPS57203843A (en) | Air-fuel ratio feedback control device | |
| JPS5423322A (en) | Automatic regulator for brightness of television screen | |
| JPS57107687A (en) | Sampling pulse correcting system | |
| JPS53144625A (en) | Signal processing system | |
| JPS54139424A (en) | Automatic control unit and electronic channel selection device | |
| JPS5341683A (en) | Sampling control system | |
| JPS552927A (en) | Automatic time correction device | |
| JPS52119853A (en) | Automatic phase control circuit | |
| JPS57107689A (en) | Sampling pulse correcting system | |
| JPS5315116A (en) | Automatic gain adjustment system | |
| JPS5220507A (en) | Tester for automatic train control means | |
| JPS52155576A (en) | Input control circuit | |
| JPS53144624A (en) | Signal processing system | |
| JPS53113427A (en) | Sampling clock reproducer | |
| JPS5734469A (en) | Automatic gain control device in ultrasonic pulse transmission | |
| JPS5710528A (en) | Sampling system | |
| JPS5437624A (en) | Phase calibration system of facsimile equipment | |
| JPS56103561A (en) | Quantization feedback circuit | |
| JPS5465277A (en) | Controlling means |