JPS57173253A - Test system - Google Patents

Test system

Info

Publication number
JPS57173253A
JPS57173253A JP5719881A JP5719881A JPS57173253A JP S57173253 A JPS57173253 A JP S57173253A JP 5719881 A JP5719881 A JP 5719881A JP 5719881 A JP5719881 A JP 5719881A JP S57173253 A JPS57173253 A JP S57173253A
Authority
JP
Japan
Prior art keywords
circuit
link
subscriber
testing
subscriber circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5719881A
Other languages
Japanese (ja)
Inventor
Takashi Morita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5719881A priority Critical patent/JPS57173253A/en
Publication of JPS57173253A publication Critical patent/JPS57173253A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M3/00—Automatic or semi-automatic exchanges
    • H04M3/22—Arrangements for supervision, monitoring or testing
    • H04M3/26—Arrangements for supervision, monitoring or testing with means for applying test signals or for measuring
    • H04M3/28—Automatic routine testing ; Fault testing; Installation testing; Test methods, test equipment or test arrangements therefor
    • H04M3/30—Automatic routine testing ; Fault testing; Installation testing; Test methods, test equipment or test arrangements therefor for subscriber's lines, for the local loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Monitoring And Testing Of Exchanges (AREA)

Abstract

PURPOSE:To obtain a test system for a PNPN link which enables the diversion of a conventional subscriber circuit testing circuit by testing the presence of the high current of a subscriber circuit and then performing other tests. CONSTITUTION:A link 2 is led into a measuring circuit 5 by a loop (b) by contacts 6 and 7 is a subscriber circuit testing circuit 4. When any high current is not detected in a measuring circuit 5, a control system makes the contacts 6 and 7 to connect a subscriber circuit 1 to a holding current supply circuit 3. Consequently, the link 2 is held by the circuit 3, so the contol system cuts off the holding current of the memory of the link 2. The subscriber circuit 1 is led into the measuring circuit 5 by a loop (c) and various measurments are carried out.
JP5719881A 1981-04-17 1981-04-17 Test system Pending JPS57173253A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5719881A JPS57173253A (en) 1981-04-17 1981-04-17 Test system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5719881A JPS57173253A (en) 1981-04-17 1981-04-17 Test system

Publications (1)

Publication Number Publication Date
JPS57173253A true JPS57173253A (en) 1982-10-25

Family

ID=13048789

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5719881A Pending JPS57173253A (en) 1981-04-17 1981-04-17 Test system

Country Status (1)

Country Link
JP (1) JPS57173253A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0085089A1 (en) * 1981-08-10 1983-08-10 Western Electric Co Semiconductor crosspoint linearizing arrangement.

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0085089A1 (en) * 1981-08-10 1983-08-10 Western Electric Co Semiconductor crosspoint linearizing arrangement.

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