JPS57170000A - Redundancy constitution of memory and operating system - Google Patents
Redundancy constitution of memory and operating systemInfo
- Publication number
- JPS57170000A JPS57170000A JP56055073A JP5507381A JPS57170000A JP S57170000 A JPS57170000 A JP S57170000A JP 56055073 A JP56055073 A JP 56055073A JP 5507381 A JP5507381 A JP 5507381A JP S57170000 A JPS57170000 A JP S57170000A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- memories
- active system
- acts
- destruction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/74—Masking faults in memories by using spares or by reconfiguring using duplex memories, i.e. using dual copies
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
PURPOSE:To achieve memory switching without interruption and to eliminate the need for the initial program loading at memory destruction, by switching the operating state from a cold standby system to active system and from hot standby system to the active system, according to the status through the use of three or the like memories. CONSTITUTION:Three memories 11a-11c are accessed by taking the same address space via processors 13a and 13b, and system control circuits 12a and 12b selecting the memories as required. The memory 11a acts like an active system making read/write, the memory 11b acts like a hot standby system only with write and the memory 11c acts like a cold standby system only with the initial loading. At the memories 11a and 11b destruction due to software runaway, the memory 11c becomes the active system via the circuits 12a and 12b, and when the memory 11b is guaranteed, the memory 11b is switched to the active system, the initial program load at memory destruction is unnecessary and the memories are switched without interruption, allowing to prevent the lowering in the processing speed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56055073A JPS57170000A (en) | 1981-04-14 | 1981-04-14 | Redundancy constitution of memory and operating system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56055073A JPS57170000A (en) | 1981-04-14 | 1981-04-14 | Redundancy constitution of memory and operating system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57170000A true JPS57170000A (en) | 1982-10-19 |
Family
ID=12988512
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56055073A Pending JPS57170000A (en) | 1981-04-14 | 1981-04-14 | Redundancy constitution of memory and operating system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57170000A (en) |
-
1981
- 1981-04-14 JP JP56055073A patent/JPS57170000A/en active Pending
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