JPS57162810A - Amplifying circuit - Google Patents
Amplifying circuitInfo
- Publication number
- JPS57162810A JPS57162810A JP4795181A JP4795181A JPS57162810A JP S57162810 A JPS57162810 A JP S57162810A JP 4795181 A JP4795181 A JP 4795181A JP 4795181 A JP4795181 A JP 4795181A JP S57162810 A JPS57162810 A JP S57162810A
- Authority
- JP
- Japan
- Prior art keywords
- source
- resistors
- diode
- switching element
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G1/00—Details of arrangements for controlling amplification
- H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
- H03G1/0017—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier
- H03G1/0029—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier using FETs
Landscapes
- Control Of Amplification And Gain Control (AREA)
Abstract
PURPOSE:To make turning on/off of a switching element controllable in accordance with the gain, by inserting a switching element between a bias circuit of the 1st gate and that of the source of a 4-pole FET. CONSTITUTION:Resistors R7, R8 and R9 for the 1st gate bias are connected in series between a power supply terminal 4 and ground, and the connecting point of the resistors R7 and R8 is connected to the 1st gate G1 of a GaAsFET6. The connecting point of the resistors R8 and R9 is connected to a source S of the FET6 via a diode 9 being a switching element, and this source S is grounded via a source ground resistor R10. In this case, the diode 9 turns off at full gain by setting each constant of resistors R7-R10, and on the other hand, AGC is slightly reduced and a drain current decreases slightly, allowing to turn on the diode 9. With this constitution, since the diode 9 turns off at full gain, the source voltage of the FET6 can completely be biased with the resistor R10.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4795181A JPS57162810A (en) | 1981-03-31 | 1981-03-31 | Amplifying circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4795181A JPS57162810A (en) | 1981-03-31 | 1981-03-31 | Amplifying circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57162810A true JPS57162810A (en) | 1982-10-06 |
Family
ID=12789660
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4795181A Pending JPS57162810A (en) | 1981-03-31 | 1981-03-31 | Amplifying circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57162810A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5723008B2 (en) * | 1972-11-08 | 1982-05-17 |
-
1981
- 1981-03-31 JP JP4795181A patent/JPS57162810A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5723008B2 (en) * | 1972-11-08 | 1982-05-17 |
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