JPS5760713A - Amplifying device - Google Patents

Amplifying device

Info

Publication number
JPS5760713A
JPS5760713A JP13489980A JP13489980A JPS5760713A JP S5760713 A JPS5760713 A JP S5760713A JP 13489980 A JP13489980 A JP 13489980A JP 13489980 A JP13489980 A JP 13489980A JP S5760713 A JPS5760713 A JP S5760713A
Authority
JP
Japan
Prior art keywords
resistors
fet
gate
gain
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13489980A
Other languages
Japanese (ja)
Inventor
Takeshi Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP13489980A priority Critical patent/JPS5760713A/en
Publication of JPS5760713A publication Critical patent/JPS5760713A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G1/00—Details of arrangements for controlling amplification
    • H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0017—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier
    • H03G1/0029—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier using FETs

Landscapes

  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To obtain an FET amplifier having the superior characteristics, by connecting the division point of the source resistor of the FET, the first gate terminal, and the power supply terminal through resistors respectively. CONSTITUTION:A connection point (m), which is the division point of the source resistor of an FET11, between resistors 5 and 6 connected between a source terminal S and the earth, the first gate terminal, and a power supply terminal 10 are connected through resistors 7 and 9'. When the drain current, resistance values of resistors 5 and 6, and a current passing through the resistor 9' are denoted as ID, R5, R6, and IB respectively, a voltage VG1 between the first gate and the earth is expressed by VG1=-[IDR5+(ID+IB)R6]for a maximum gain. Therefore, the gate bias voltage to make the gain of the FET amplifying device maximum can coincide with the gate bias voltage which improves the cross modulation characteristics for a deep gain control. As a result, FET amplification is possible which has a high gain and a wide gain control quantity and is superior in cross modulation characteristics.
JP13489980A 1980-09-27 1980-09-27 Amplifying device Pending JPS5760713A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13489980A JPS5760713A (en) 1980-09-27 1980-09-27 Amplifying device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13489980A JPS5760713A (en) 1980-09-27 1980-09-27 Amplifying device

Publications (1)

Publication Number Publication Date
JPS5760713A true JPS5760713A (en) 1982-04-12

Family

ID=15139117

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13489980A Pending JPS5760713A (en) 1980-09-27 1980-09-27 Amplifying device

Country Status (1)

Country Link
JP (1) JPS5760713A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6449409A (en) * 1987-08-20 1989-02-23 Nec Corp Bias circuit for field effect transistor

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4841382A (en) * 1971-09-28 1973-06-16

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4841382A (en) * 1971-09-28 1973-06-16

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6449409A (en) * 1987-08-20 1989-02-23 Nec Corp Bias circuit for field effect transistor

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