JPS57162434A - Annealing method for single crystal wafer - Google Patents

Annealing method for single crystal wafer

Info

Publication number
JPS57162434A
JPS57162434A JP4858481A JP4858481A JPS57162434A JP S57162434 A JPS57162434 A JP S57162434A JP 4858481 A JP4858481 A JP 4858481A JP 4858481 A JP4858481 A JP 4858481A JP S57162434 A JPS57162434 A JP S57162434A
Authority
JP
Japan
Prior art keywords
wafer
theta
single crystal
axis
cleavage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4858481A
Other languages
Japanese (ja)
Other versions
JPH0261145B2 (en
Inventor
Junji Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4858481A priority Critical patent/JPS57162434A/en
Publication of JPS57162434A publication Critical patent/JPS57162434A/en
Publication of JPH0261145B2 publication Critical patent/JPH0261145B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/268Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To prevent a wafer from cracks by a method wherein energy beam scans for annealing are conducted in directions different from the direction of cleavage in a single crystal wafer. CONSTITUTION:A single crystal wafer 1 of a face direction (100) is fixed upon an X-Y platform and an angle theta is formed by an axis F-F at a right angle to a facet 3 and an axis X or Y. The axes X and Y are in the direction of <100>, a direction of difficult cleavage, when theta=45 deg.. Under such circumstances, the energy beam focus 7 scanning in the direction X or Y does not render the wafer easy to break during handling after treatment. The possibility of breakage is far less than after a beam application along the direction of <110>, a direction of easy cleavage, even when theta is chosen anywhere between 22.5 deg. and 67.5 deg.. By following this method, thermal distortion remaining in the wafer 2 does not lead to breakage, and therefore annealing and single crystallization can be effected can be effected at a fast pace. Accomplishing a same result is a scan conducted in a direction <100> intercepting at an angle theta the axis X or Y at a right angle to or in parallel with the facet 3.
JP4858481A 1981-03-31 1981-03-31 Annealing method for single crystal wafer Granted JPS57162434A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4858481A JPS57162434A (en) 1981-03-31 1981-03-31 Annealing method for single crystal wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4858481A JPS57162434A (en) 1981-03-31 1981-03-31 Annealing method for single crystal wafer

Publications (2)

Publication Number Publication Date
JPS57162434A true JPS57162434A (en) 1982-10-06
JPH0261145B2 JPH0261145B2 (en) 1990-12-19

Family

ID=12807444

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4858481A Granted JPS57162434A (en) 1981-03-31 1981-03-31 Annealing method for single crystal wafer

Country Status (1)

Country Link
JP (1) JPS57162434A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4927778A (en) * 1988-08-05 1990-05-22 Eastman Kodak Company Method of improving yield of LED arrays
JP2011167718A (en) * 2010-02-18 2011-09-01 Saitama Univ Apparatus and method for machining inside of substrate
JP2016076650A (en) * 2014-10-08 2016-05-12 トヨタ自動車株式会社 Semiconductor device manufacturing method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55150238A (en) * 1979-05-10 1980-11-22 Matsushita Electric Ind Co Ltd Method of irradiating laser beam

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55150238A (en) * 1979-05-10 1980-11-22 Matsushita Electric Ind Co Ltd Method of irradiating laser beam

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4927778A (en) * 1988-08-05 1990-05-22 Eastman Kodak Company Method of improving yield of LED arrays
JP2011167718A (en) * 2010-02-18 2011-09-01 Saitama Univ Apparatus and method for machining inside of substrate
JP2016076650A (en) * 2014-10-08 2016-05-12 トヨタ自動車株式会社 Semiconductor device manufacturing method

Also Published As

Publication number Publication date
JPH0261145B2 (en) 1990-12-19

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