JPS57161663A - Display device for frequency deviation in frequency counting type signal generator - Google Patents

Abstract

PURPOSE:To reduce the generation of noises by a method wherein a reference frequency stored in a memory circuit and a frequency counted thereafter are added while one of them is subjected to complement conversion and only control on whether the complement conversion by a complement converter is to be conducted or is made according to the dicision of the size by a comparator. CONSTITUTION:A frequency counted by a frequency counter 12 is stored as a reference frequency fo in a memory circuit 13. A complement of 9 of fo and a frequency fv counted later are added by an adder 16. When fv is decided to be greater than fo by a comparator 15, 1 further added to the carry input of the adder 16, and according to a signal from the comparator 15, the output of the adder 16 is not subjected to complement conversion at a complementer 17 and displayed as it is in a display unit 18. When fv<=fo, 1 is not added to the carry input of the adder 16 and the output fv+(9-fo) of the adder 16 is converted into the complement of 9. In this way, a control is made only as to whether the complement conversion by the complementer 17 is to be conducted or not, according to the decision of the size by the comparator 15. Therefore, the operation requires only one control signal and thus the generation of noises is reduced.